Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2001-04-02
2002-04-09
Nguyen, Ha Tran (Department: 2812)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S383000, C257S773000, C257S774000, C438S233000, C438S283000, C438S533000, C438S421000, C438S422000, C438S586000, C438S597000, C438S619000
Reexamination Certificate
active
06369430
ABSTRACT:
FIELD OF THE INVENTION
This invention pertains, in general, to semiconductor processing and, more specifically, to forming an integrated circuit device with a contact hole.
BACKGROUND OF THE INVENTION
Interconnect technology is a factor in the ability to reduce the area of integrated circuit devices. Multi-level metallization layouts have assisted dimension shrinkage by having multiple metal lines share the same area of the device. In a multi-level metallization layout, a dielectric layer, termed an interlevel dielectric layer (ILD) or a pre-metal dielectric (PMD) layer, is formed between the first metal layer and the transistors. Typically, the dielectric layer is formed to isolate the metal layer from the transistors. To electrically connect the underlying gate of the transistors or the substrate (i.e. the source or drain region) to the first metal line, a contact hole is etched within the ILD layer and filled with a conductive material to form a contact plug. Typically, a contact hole is formed between two transistors. These contact holes are desirably small so the transistors may be close together but must also be reliable. There, thus, is a need for contacts that are reliable and allow for transistors to be close together.
REFERENCES:
patent: 6184073 (2001-02-01), Lage et al.
patent: 6228731 (2001-05-01), Liaw et al.
patent: 6274426 (2001-08-01), Lee et al.
Adetutu Olubunmi O.
Grudowski Paul A.
Lii Yeong-Jyh T.
Clingan, Jr. James L.
Motorola Inc.
Nguyen Ha Tran
Vo Kim-Marie
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