Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2000-12-22
2002-07-02
Ghyka, Alexander G. (Department: 2812)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S694000, C438S710000, C438S725000, C438S758000, C438S787000
Reexamination Certificate
active
06413877
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to the fabrication of semiconductor-based devices. More particularly, the present invention relates to improved techniques for fabricating semiconductor-based devices with organo-silicate-glass.
In semiconductor-based device (e.g., integrated circuits or flat panel displays) manufacturing, dual damascene structures may be used in conjunction with copper conductor material to reduce the RC delays associated with signal propagation in aluminum based materials used in previous generation technologies. In dual damascene, instead of etching the conductor material, vias, and trenches may be etched into the dielectric material and filled with copper. The excess copper may be removed by chemical mechanical polishing (CMP) leaving copper lines connected by vias for signal transmission. To reduce the RC delays even further, low dielectric constant materials may be used. These low dielectric constant materials may include organo-silicate-glass (OSG) materials, such as Coral™ and Black Diamond™. OSG materials may be silicon dioxide doped with organic components such as methyl groups. OSG materials have carbon and hydrogen atoms incorporated into a silicon dioxide lattice, which lowers the dielectric constant of the material. However OSG materials may be susceptible to damage when exposed to oxygen, H
2
, and NH
3
gases, which are used for stripping photo resist. To facilitate discussion
FIG. 1
is a flow chart of an etching process of OSG materials used in the prior art.
FIGS. 2A-C
are schematic side views of an etched OSG according to the process of FIG.
1
. An OSG layer
204
may be deposited on a substrate
208
(step
104
), as shown in FIG.
2
A. The substrate
208
may be a silicon wafer or another type of material or may be part of a layer over a wafer. An antireflective coating (ARC)
212
may be deposited over the OSG layer
204
(step
108
). A patterned resist mask
216
may be placed over the ARC
212
(step
112
). The patterned resist mask
216
has an aperture
220
. The substrate
208
may be placed in an etching chamber where the OSG layer
204
is etched (step
116
). A plasma dry etch may be used to etch the OSG layer
204
, which forms an opening
224
under the aperture
220
in the patterned resist mask
216
, as shown in FIG.
2
B. Some of the patterned resist mask
216
is removed during the OSG layer etch. In addition, sidewalls
228
may be formed within the opening
224
. The patterned resist mask
216
and sidewalls
228
would be simultaneously stripped (step
120
). One way of simultaneously stripping the patterned resist mask
216
and sidewalls
228
is by exposing the patterned resist mask
216
to a plasma with a CF
4
(or another fluorocarbon) and N
2
/O
2
, N
2
/H
2
, or N
2
/NH
3
etchant gas. The plasma would strip both the patterned resist mask
216
and the sidewalls
228
, as shown in FIG.
2
C.
OSG materials may be very susceptible to damage due to the removal of organic content by exposure to the plasma used to strip the resist and sidewalls. The plasma may diffuse a few hundred angstroms into the OSG layer and cause damage
240
to the OSG layer bordering the opening
224
. The ARC
212
may protect the upper OSG layer
204
. Part of the damage caused by the plasma is the removal of carbon and hydrogen from the damage area causing the OSG to be more like silicon dioxide, which has a higher dielectric constant. Damage may be quantified by measuring the change in SiC/SiO ratio of the OSG layer from FTIR analysis. A decrease of 1% in SiC/SiO ratio on a blanket film of a 1 micron thickness could be very significant as the damage is limited to a few hundred angstroms on the top layer of the blanket film. When translated to the trench side wall that means a damage of a few hundred angstroms on each side of a 2000 Å trench wall.
It is desirable to reduce damage to the OSG layer.
SUMMARY OF THE INVENTION
To achieve the foregoing and other objects and in accordance with the purpose of the present invention for making an etch organo-silicate-glass (OSG) layer over a substrate is provided. Generally an OSG layer is placed over the substrate. A patterned resist mask is placed over the OSG layer. The OSG layer is then etched, where the etching of the OSG layer forms at least one opening in the OSG layer and sidewall within the at least one opening. The patterned resist mask is then stripped by a plasma. A wet stripping is then used to remove the sidewalls.
In addition, the present invention provides an etched organo-silicate-glass (OSG) layer. Generally an OSG layer is placed over the substrate. A patterned resist mask is placed over the OSG layer. The OSG layer is then etched, where the etching of the OSG layer forms at least one opening in the OSG layer and sidewall within the at least one opening. The patterned resist mask is then stripped by a plasma. A wet stripping is then used to remove the sidewalls.
These and other features of the present invention will be described in more detail below in the detailed description of the invention and in conjunction with the following figures.
REFERENCES:
patent: 5801077 (1998-09-01), Chor et al.
patent: 5827782 (1998-10-01), Shih
patent: 5846884 (1998-12-01), Naeem et al.
Beyer Weaver & Thomas LLP
Ghyka Alexander G.
Lam Research Corporation
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