Coating processes – Optical element produced
Reexamination Certificate
2002-01-31
2004-06-15
Chen, Bret (Department: 1762)
Coating processes
Optical element produced
C427S571000, C427S579000, C427S255270, C427S255700, C427S376200
Reexamination Certificate
active
06749893
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to the manufacture of integrated optical devices, such as optical multiplexers (Mux) and demultiplexers (Dmux), and in particular to a method of preventing cracking in optical quality silica layers.
2. Description of Related Art
The manufacture of integrated optical devices requires the fabrication of silica waveguides from low refractive index buffer and cladding silica layers and from a high refractive index core silica layer over a silicon wafer. These buffer, core and cladding silica layers must have excellent optical transparency in the 1.31 &mgr;m S-band, in the 1.55 &mgr;m C-band and in the 1.63 L-band.
FIG.
1
and
FIG. 2
demonstrate that a novel PECVD technique described in our co-pending U.S. patent application Ser. No. 09/833,711 results in low refractive index buffer and cladding silica layers free from the undesirable residual SiN—H and Si:N—H oscillators (observed as a FTIR peak centered at 3380 cm-1 and which second vibration harmonics causes optical absorption in the 1.55 &mgr;m C-band) since eliminated after a low temperature thermal treatment of only 800° C.
FIG. 3
demonstrates that another novel PECVD technique described in our co-pending U.S. patent application Ser. No. 09/867,662 results in a high refractive index core silica layer free from the undesirable residual SiN—H and Si:N—H oscillators that are eliminated after a low temperature thermal treatment of only 800° C.
FIG. 4
demonstrates that a high refractive index core silica layer free from the undesirable residual SiN—H and Si:N—H oscillators can be achieved after a thermal treatment of only 600° C. as described in our co-pending U.S. patent application Ser. No. 09/956,916.
FIG. 5
shows that a thermal treatment of the cladding silica layer at a temperature of only 600° C. is not sufficient to completely eliminate the residual SiN—H and Si:N—H oscillators of the upper cladding silica layer. It is then necessary to increase the temperature of this final thermal treatment of the cladding silica layer beyond 600° C.
FIG. 6
, FIG.
7
and
FIG. 8
show such a final thermal treatment of the cladding silica layer at a temperature beyond 600° C. can result in cracking of the various silica layers joining deep etched structures in the optical device.
The following published literature describes the need for a high temperature heat treatment as to eliminate the residual SiN—H and Si:N—H oscillators and achieve high performance optical quality PECVD silica layers: Valette S., New integrated optical multiplexer-demultiplexer realized on silicon substrate, ECIO '87, 145, 1987; Henry C., Glass waveguides on silicon for hybrid optical packaging, J. Lightwave tech., 7 (10), 1350, 1989; Grand G., Low-loss PECVD silica channel waveguides for optical communications, Electron. Lett., 26 (25), 2135, 1990; Bruno F., Plasma-enhanced chemical vapor deposition of low-loss SiON optical waveguides at 1.5-&mgr;m wavelength, Applied Optics, 30 (31), 4560, 1991; Lai Q., Simple technologies for fabrication of low-loss silica waveguides, Elec. Lett., 28 (11), 1000, 1992; Lai Q., Formation of optical slab waveguides using thermal oxidation of SiOx, Elec. Lett., 29 (8), 714, 1993; Liu K., Hybrid optoelectronic digitally tunable receiver, SPIE, Vol 2402, 104, 1995; Tu Y., Single-mode SiON/SiO2/Si optical waveguides prepared by plasma-enhanced Chemical vapor deposition, Fiber and integrated optics, 14, 133, 1995; Hoffmann M., Low temperature, nitrogen doped waveguides on silicon with small core dimensions fabricated by PECVD/RIE, ECIO'95, 299, 1995; Poenar D., Optical properties of thin film silicon-compatible materials, Appl. Opt. 36 (21), 5112, 1997; Hoffmann M., Low-loss fiber-matched low-temperature PECVD waveguides with small-core dimensions for optical communication systems, IEEE Photonics Tech. Lett., 9 (9), 1238, 1997; Pereyra I., High quality low temperature DPECVD silicon dioxide, J. Non-Crystalline Solids, 212, 225, 1997; Kenyon T., A luminescence study of silicon-rich silica and rare-earth doped silicon-rich silica, Fourth Int. Symp. Quantum Confinement Electrochemical Society, 97-11, 304, 1997; Alayo M., Thick SiOxNy and SiO2 films obtained by PECVD technique at low temperatures, Thin Solid Films, 332, 40, 1998; Bulla D., Deposition of thick TEOS PECVD silicon oxide layers for integrated optical waveguide applications, Thin Solid Films, 334, 60, 1998; Valette S., State of the art of integrated optics technology at LETI for achieving passive optical components, J. of Modern Optics, 35 (6), 993, 1988; Ojha S., Simple method of fabricating polarization-insensitive and very low crosstalk AWG grating devices, Electron. Lett., 34 (1), 78, 1998; Johnson C., Thermal annealing of waveguides formed by ion implantation of silica-on-Si, Nuclear Instruments and Methods in Physics Research, B141, 670, 1998; Ridder R., Silicon oxynitride planar waveguiding structures for application in optical communication, IEEE J. of Sel. Top. In Quantum Electron., 4 (6), 930, 1998; Germann R., Silicon-oxynitride layers for optical waveguide applications, 195
th
meeting of the Electrochemical Society, 99-1, May 1999, Abstract 137, 1999; Worhoff K., Plasma enhanced chemical vapor deposition silicon oxynitride optimized for application in integrated optics, Sensors and Actuators, 74, 9, 1999; Offrein B., Wavelength tunable optical add-after-drop filter with flat passband for WDM networks, IEEE Photonics Tech. Lett., 11 (2), 239, 1999.
None of these cited references, however, address the crack issue of the various silica layers joining deep etched structures in the optical device stressed by the final thermal treatment ranging from 600 to 1200° C. in these cited references.
SUMMARY OF THE INVENTION
The present invention involves the use of a special technique wherein a thick PECVD silica layer is deposited on the back face of the silicon wafer just prior to a high temperature thermal treatment beyond 600° C. of the cladding silica layer of integrated optical devices made of thick buffer, core and cladding silica layers so as to prevent the cracking of these thick silica layers. This results in lower optical loss devices in the 1.31 &mgr;m S-band, in the 1.55 &mgr;m C-band and in the 1.63 L-band.
The use of an extra film deposited on the back of the wafer reduces tensile stress and, in fact, as to impose a compressive mechanical stress in cladding and prevent cladding cracking from occurring following a temperature treatment of the cladding at a temperature of more then 600° C.
Accordingly therefore the present invention provides a method a method of making an integrated photonic device having buffer, core and cladding layers deposited on a front side of a wafer having said front side and a back side. A thick tensile stress layer is deposited on the back side of the wafer just prior to performing a high temperature thermal treatment above about 600° C. on the cladding layer to prevent the cracking of said layers as a result of said thermal treatment. The extra layer preferably has a thickness between 5 to 15 &mgr;m and a tensile mechanical stress ranging from 10 to 2000 MPa.
The extra layer forms a core layer which is normally deposited after deposition of the cladding layer. The buffer, core and cladding layers are normally silica.
The invention also provides a method of making a photonic device, comprising providing a wafer having a front side and a back side; depositing a buffer layer on the front side of said wafer; subjecting the wafer to a first thermal treatment between 500 and 1200° C.; depositing a core layer over said buffer layer; subjecting the wafer to a second thermal treatment between 500 and 1200° C.; depositing a cladding layer; depositing an extra layer on the back side of the wafer; and performing a high temperature thermal treatment above about 600° C. on the cladding layer to prevent the cracking of the deposited layers.
REFERENCES:
patent: 5761350 (1998-06-01), Koh
patent: 5857048 (1999-01-01), Feuer et al.
patent: 5979188 (1999-11-01), Oj
Archambault Sylvie
Lachance Jonathan
Ouellet Luc
(Marks & Clerk)
Chen Bret
DALSA Semiconductor Inc.
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