Method of prefetching data for references with multiple stride d

Details Method of prefetching data for references with multiple stride d Method of prefetching data for references with multiple stride d

1996-04-26

1998-05-12

Voeltz, Emanuel Todd

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

711157, 711 3, G06F 945

Patent

active

057520372

ABSTRACT:
There are two separate, yet related, prefetching strategies used for data references used having multiple strides, which typically occur in data references within nested loop structures. The first approach attempts to reverse one or more of the nested loops so that the strides of the reference are in the same direction. Once the loop or loops are reversed, data elements can be prefetched in the common loop direction. Preferably, the inner loops are reversed as compared with the outer loops, but this is not essential. The second approach is used where the data reference has multiple strides and the loops cannot be reversed. In this case, the prefetching method prefetches in the opposite direction of the innermost loop that surrounds the data reference. The second approach is used when the first approach cannot be used and where the strides of the reference have different directions and the inner loop is expected to iterate relatively few times. In such a case the second approach produces better results than the prior art.

REFERENCES:
patent: 5333291 (1994-07-01), Grunbok et al.
patent: 5357618 (1994-10-01), Mirza et al.
"A Fortran Compiler for the FPS-164 Scientific Computer", Touzeau R. F., Proc. ACM SIGPLAN Notices v19 n6, Jun. 1984.
"A Loop Transformation Theory and an Algorithm to Maximize Parallelism" by Michael E. Wolf et al., IEEE Transactions on Parallel and Distributed Systems, vol. 2, No. 4, Oct. 1991.
"Design and Evaluation of a Compiler Algorithm for Prefetching" by Todd C. Mowry, et al., Computer Systems Laboratory, Stanford University, ASPLOS V, Oct. 1992.

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