Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1997-11-07
2000-07-18
Gossage, Glenn
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711113, G06F 1300
Patent
active
060921544
ABSTRACT:
A method of pre-caching data using thread lists, and a multi-media editing system using such a pre-caching method, are disclosed. A list of data which will be required by a host application is passed to a data storage device such as a hard disk drive, CDROM drive, or other data storage device. The data storage device locates the data and stores it in its own storage device buffer. Thus, the data is immediately available when requested by the host. The pre-caching method may be used in a multimedia or video editing system to quickly retrieve data from storage devices. The thread list may include a video thread, an audio thread and a data access parameter reflecting host data application requirements. The data access parameter may include at least one of data prioritization, cache management, error processing including resend capability, and data supply rate. The thread list may also include data specifying a percentage of the storage device buffer to be reserved for read ahead data and a percentage of the storage device buffer to be reserved for data which has been previously provided to the host computer.
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Curtis Allen J.
Rassool Reza A.
Whiteley Stephen T.
Gossage Glenn
Intel Corporation
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