Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2001-03-30
2003-09-09
Zarabian, Amir (Department: 2822)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S714000, C438S710000, C438S700000
Reexamination Certificate
active
06617257
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to an improved method for plasma etching antireflective coatings in the fabrication of integrated circuits.
BACKGROUND OF THE INVENTION
A common requirement in integrated circuit fabrication is the etching of openings such as contacts and vias in dielectric materials. The dielectric materials include doped silicon oxide such as fluorinated silicon oxide (FSG), undoped silicon oxide such as silicon dioxide, silicate glasses such as boron phosphate silicate glass (BPSG) and phosphate silicate glass (PSG), doped or undoped thermally grown silicon oxide, doped or undoped TEOS deposited silicon oxide, etc. The dielectric dopants include boron, phosphorus and/or arsenic. The dielectric can overlie a conductive or semiconductive layer such as polycrystalline silicon, metals such as aluminum, copper, titanium, tungsten, molybdenum or alloys thereof, nitrides such as titanium nitride, metal silicides such as titanium silicide, cobalt silicide, tungsten silicide, molydenum silicide, etc.
Various plasma etching techniques for etching openings in silicon oxide are disclosed in U.S. Pat. Nos. 5,013,398; 5,013,400; 5,021,121; 5,022,958; 5,269,879; 5,529,657; 5,595,627; 5,611,888; and 5,780,338. The plasma etching can be carried out in medium density reactors such as the parallel plate plasma reactor chambers described in the '398 patent or the triode type reactors described in the '400 patent or in high density reactors such as the inductive coupled reactors described in the '657 patent. U.S. Pat. No. 6,090,304 discloses a method of plasma etching semiconductor substrates in a dual frequency plasma reactor wherein a first radiofrequency (RF) source is coupled to a top showerhead electrode through an RF matching network and a bottom electrode (on which a semiconductor wafer is supported) is coupled to a second RF source through a second matching network.
In processing semiconductor wafers, it is conventional to provide an organic bottom antireflective coating (BARC) beneath a photoresist for purposes of minimizing optical reflection of the radiation used to develop a pattern of openings (such as contact holes) in the photoresist. It is conventional to refer to an organic arc as a BARC whereas an inorganic ARC is referred to as a “dielectric” ARC or DARC. It is also conventional to plasma etch the BARC through the openings formed in the resist in order to transfer the photoresist pattern to the BARC. Etch gas mixtures for plasma etching organic ARC materials are disclosed in U.S. Pat. Nos. 5,773,199; 5,910,453; 6,039,888; 6,080,678; and 6,090,722. Of these, the '199 patent discloses a gas mixture of CHF
3
+CF
4
+O
2
+Ar; the '453 patent discloses gas mixtures of N
2
+He+O
2
or N
2
+O
2
or N
2
+He; the '888 discloses a gas mixture of O
2
+CO; the '678 patent discloses a gas mixture of O
2
+SO
2
; and the '722 patent discloses a gas mixture of (C
2
F
6
+Ar.
As device geometries become smaller and smaller, the need for high etch selectivity is even greater in order to achieve plasma etching openings through antireflective coatings while preserving critical dimensions (CD). Accordingly, there is a need in the art for a plasma etching technique which provides high etch selectivity and/or which etches such layers at a desirable rate.
SUMMARY OF THE INVENTION
The invention provides a method of etching an organic antireflective coating with selectivity to an underlying layer, comprising supporting a semiconductor substrate in a plasma etch reactor, the substrate including an organic antireflective coating over an underlying layer, and energizing an O
2
-free etchant gas into a plasma state and etching openings in the organic antireflective coating, the etchant gas comprising a sulfur-containing gas and a carrier gas.
According to a preferred embodiment, the openings comprise vias, contacts, and/or trenches of a dual damascene, self-aligned contact or self-aligned trench structure. The openings can also comprise a pattern of conductor lines for a gate electrode. The organic antireflective coating can be a polymer film underlying a patterned photoresist. Because the etchant gas chemistry can passivate sidewalls of openings in the photoresist, the etchant gas minimizes the lateral etch rate of the photoresist to thereby maintain critical dimensions defined by the photoresist.
The plasma etch reactor can comprise an ECR plasma reactor, an inductively coupled plasma reactor, a capacitively coupled plasma reactor, a helicon plasma reactor or a magnetron plasma reactor. A preferred plasma etch reactor is an inductively coupled plasma reactor including a planar antenna which couples RF energy into the chamber through a dielectric window.
The sulfur-containing gas is preferably SO
2
and the preferred carrier gas is He or Ar. The etchant gas can further comprise HBr. During the etching step, pressure in the plasma etch reactor can be up to 100 mTorr and/or temperature of the substrate support can be −20° C. to +80° C. As an example, the sulfur-containing gas can comprise SO
2
supplied to the plasma etch reactor at a flow rate of 5 to 200 sccm and the carrier gas can comprise He or/or Ar supplied to the plasma etch reactor at a flow rate of 5 to 150 sccm. If HBr is included in the etch gas, the HBr can be supplied to the plasma etch reactor at a flow rate of 5 to 150 sccm. More preferably, the flow rates of SO
2
, HBr and He are 5 to 200 sccm SO
2
, 10 to 50 sccm HBr and 50 to 150 sccm He.
The etching step can be followed by additional etching steps and subsequent filling of the openings with metal. The method of the invention can also include steps of forming the photoresist layer on the substrate, patterning the photoresist layer to form a plurality of openings followed by etching a metallization pattern of conductor lines, via or contact openings in the organic antireflective coating.
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M. Moalem et al., “Low-temperature vapor-phase etching of silicon carbide by dioxygen difluoride”, Appl. Phys. Lett. 66 (25), Jun. 19, 1995, pp. 3480-3482.
Notification of Transmittal of the International Search Report or the Declaration dated Jan. 21, 2003 for PCT/US02/06650.
Written Opinion dated Jan. 31, 2003 for PCT/US02/06650.
Chiang Conan
Jiang Wei-nan
Lee Chris
Lee Dai N.
Lin Frank Y.
Burns Doane , Swecker, Mathis LLP
Duong Khanh B.
Lam Research Corporation
Zarabian Amir
LandOfFree
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