Method of placing wires

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C716S030000

Reexamination Certificate

active

07877709

ABSTRACT:
A method of placing wires for placing a shield wire with respect to a shield subject wire placed on a chip, a method includes setting a plurality of wire tracks on the chip, dividing the chip into at least a first area and a second area according to a division boundary, confirming whether the shield subject wire exists around the division boundary in the second area when the division boundary is not laid on top of the wire track, and determining whether to place the shield wire on a wire track being adjacent to division boundary in the first area based on the confirming.

REFERENCES:
patent: 6951007 (2005-09-01), Kaida
patent: 2004/0031010 (2004-02-01), Kaida
patent: 2006/0190902 (2006-08-01), Shirai
patent: 2974398 (1999-09-01), None

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method of placing wires does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of placing wires, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of placing wires will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2732078

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.