Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent
1997-10-01
2000-03-07
Beausoliel, Jr., Robert W.
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
714 36, 714 32, 714 34, 714 42, 714 43, 714 44, 714720, 714739, G06F 1214
Patent
active
060354208
ABSTRACT:
A BIOS testing routine is initiated. Control is transferred to a diagnostic routine. The diagnostic routine performs a series of test in which a plurality of components are examined. In one embodiment, a random access/random data memory test is performed on a block of memory. Subsequently, control is transferred to the BIOS testing routine.
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Liu Ji-hwan
Starr Lowell
Wu Wei
Beausoliel, Jr. Robert W.
Hamdan Wasseem H.
Micron Electronics Inc.
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