Method of performing a column decode in a memory device and appa

Static information storage and retrieval – Read/write circuit – Signals

Patent

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36523006, G11C 700

Patent

active

055418821

ABSTRACT:
A delay circuit (10) for a memory device introduces asymmetrical delay to prevent a false write operation from being performed by the memory device, The asymmetrical delay can be disabled during read operations in response to a control signal (CS) in order to allow for fast column access.

REFERENCES:
patent: 3970873 (1976-07-01), Banfi
patent: 4623990 (1986-11-01), Allen et al.
patent: 4851711 (1989-07-01), Chan et al.
patent: 4985865 (1991-01-01), Houston
patent: 5124573 (1992-06-01), Wong

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