Method of packaging multi chip module

Details Method of packaging multi chip module Method of packaging multi chip module

2000-07-28

2004-09-28

Pham, Long (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

C257S723000, C257S778000, C257S784000, C257S787000

Reexamination Certificate

active

06798054

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a method or packaging an integrated circuit (IC) package, and particularly, to a low cost and high reliability method of packaging a plurality of bare chips and CSP(Chip Scale Package) on a substrate for a multi chip module package (MCM package) so as to increase the package density.
BACKGROUND OF THE INVENTION
In conventional semiconductor manufacture, a wafer which is well treated is cut into a plurality of chips, and fixed on a lead frame using gold (Au) wires to connect micro electrodes on the chip and pins of the lead frame. The above structure is then enclosed by suitable plastics to protect the internal semiconductor devices. The process to connect the chip to the lead frame and enclose the structure is referred to as packaging.
The present advanced package, such as CSP (chip scale package), becomes much smaller, lighter, thinner, and shorter compared with the conventional package, such as, QFP (Quad Flat Package) SOP (Small Outline Package) in order to reduce the cost. Meanwhile, ceramic packaging has been gradually replaced by plastic packaging. The reliability of the product is further enhanced by multi layer interconnect structure, protection layer process, and high quality of packaging. To further reduce the cost of packaging is greatly desired in the present IC industry. Therefore, advanced packaging such as CSP or wafer level CSP has been developed to increase the package density. MCM package is one of most promising techniques.
KGD is defined as a chip that meets the specification and passes the test without wiring. To increase the qualified ratio of a MCM package in the semiconductor process, it is desired to use KGD in packaging. However, the use of KGD increases the cost of packaging.
SUMMARY OF THE INVENTION
To overcome the above shortcoming in the conventional IC packaging, an object of the present invention is to provide a method of packaging MCM with CSPs as small and thin package bodies and integrating those bare chips and CSP into a ball grid array package (BGA package) to greatly reduce the cost because CSP test has advantages of easy test and low cost compared with conventional KGD test.
Another object of the present invention is to provide a MCM package structure of low cost and high reliability, which includes a substrate, one or more chip packages, a plurality of electrical connect pins, and a package material to enclose the substrate, the chips, and the chip package.


REFERENCES:
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