Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2006-04-11
2006-04-11
Norton, Nadine G. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S725000, C430S030000
Reexamination Certificate
active
07026251
ABSTRACT:
A method of providing a reticle layout for a die having at least three patterns, namely a right pattern, a center pattern, and a left pattern, where the center pattern is oversized relative to the photolithography step size. To avoid the non-uniformity effects resulting from stitching the center pattern, the center pattern size is minimized. This is accomplished by moving portions of the center pattern to the left and right patterns.
REFERENCES:
patent: 5825194 (1998-10-01), Bhuva et al.
patent: 6194105 (2001-02-01), Shacham et al.
patent: 6541165 (2003-04-01), Pierrat
Huffman James D.
Smith Jack C.
Brady III Wade James
Brill Charles A.
Norton Nadine G.
Tran Binh X.
LandOfFree
Method of optimized stitching for digital micro-mirror device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of optimized stitching for digital micro-mirror device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of optimized stitching for digital micro-mirror device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3584751