Method of operating dynamic random access memory

Static information storage and retrieval – Systems using particular element – Capacitors

Reexamination Certificate

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C365S149000, C365S189090

Reexamination Certificate

active

10711938

ABSTRACT:
A method of operating a dynamic random access memory (DRAM) using a bit line and a bit line bar is disclosed. The DRAM stores data by using a charge storage device, which is coupled to the bit line via a switch device. A voltage drop occurs when the switch device is turned on. The method programs the charge storage device with a first voltage or a zero voltage in response to a power voltage reduction due to the voltage drop. For accessing the data, the bit line and the bit line bar are charged to the power voltage, the switch device is turned on and the data stored in the charge storage device is determined according to a voltage difference between the bit line and the bit line bar.

REFERENCES:
patent: 5724286 (1998-03-01), Gillingham
patent: 5903511 (1999-05-01), Gillingham
patent: 6118717 (2000-09-01), Brady
patent: 6421285 (2002-07-01), Matsuzaki et al.
patent: 6741514 (2004-05-01), Sako
patent: 6829682 (2004-12-01), Kirihata et al.

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