Method of operating a random access memory device having a plura

Details Method of operating a random access memory device having a plura Method of operating a random access memory device having a plura

1996-10-09

1997-12-16

Nguyen, Tan T.

Static information storage and retrieval

Systems using particular element

Magnetoresistive

365131, 365171, G11C 1100

Patent

active

056992939

ABSTRACT:
A magnetic random access memory device (10) has a plurality of pairs of memory cells (21a,21b), a column decoder (31), a row decoder (32), and a comparator (60). The pair of memory cells (21a,21b) is designated by column decoder (31) and row decoder (32) in response to a memory address. Complementary bits ("0" and "1") are stored in the pair of memory cells (21a,21b). When the state in the pair of memory cell (21a,21b) is read, both bits in the pair of memory cells (21a,21b) are compared to produce an output at one read cycle time to a bit line (70). This memory device omits a conventional auto-zeroing step so that a high speed MRAM device can be attained.

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