Method of operating a memory device, memory module, and a...

Details Method of operating a memory device, memory module, and a... Method of operating a memory device, memory module, and a...

2008-07-22

2008-07-22

Mclean, Kimberly (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S005000, C711S105000, C711S100000

Reexamination Certificate

active

11194773

ABSTRACT:
There is provided a method of operating a memory device comprising at least one memory module, a corresponding memory module and a memory device comprising the at least one memory module. It is proposed that in the memory module (100a, 100b, 100c, 100d) a command and write data signal (CA, WD) is received and a read data signal (RD) is transmitted from the memory module (100a, 100b, 100c, 100d). Further, an input clock signal (CLK) is received in the memory module (100a, 100b, 100c, 100d) and is regenerated by means of a clock synthesizer unit (150) of the memory module (100a, 100b, 100c, 100d) to produce a regenerated input clock signal of the memory module (100a, 100b, 100c, 100d). The read data signal (RD) transmitted from the memory module (100a, 100b, 100c, 100d) is synchronized to the regenerated input clock signal of the memory module (100a, 100b, 100c, 100d). For this purpose, the clock synthesizer unit (150) preferably comprises a phase-locked loop.

REFERENCES:
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patent: 2003/0046507 (2003-03-01), Swanson
patent: 2003/0193927 (2003-10-01), Hronik
patent: 2004/0158675 (2004-08-01), Hirose
patent: 2006/0179262 (2006-08-01), Brittain et al.
patent: 1 030 309 (2000-08-01), None

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