Method of operating a field programmable memory array with a fie

Details Method of operating a field programmable memory array with a fie Method of operating a field programmable memory array with a fie

1998-11-10

2000-09-12

Hoang, Huan

Static information storage and retrieval

Read/write circuit

Including specified plural element logic arrangement

326 38, 326 39, 36523003, G11C 700

Patent

active

061187070

ABSTRACT:
A field programmable memory array having a plurality of sub-arrays is provided. Programmable address decoders, programmable hierarchical bit line arrangements, programmable I/O arrangements, among other features, are provided to enable programming of portions of the array into selected modes. The modes may include wide memory, deep memory, FIFO, LIFO, among others. An embodiment of the invention is disclosed wherein the field programmable memory array is integrated with the programmable resources of a field programmable gate array.

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