Method of multi-step reactive ion etch for patterning adjoining

Details Method of multi-step reactive ion etch for patterning adjoining Method of multi-step reactive ion etch for patterning adjoining

1995-08-03

1997-12-23

Bowers, Jr., Charles L.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438656, 438751, H01L 2144

Patent

active

057007390

ABSTRACT:
A method for forming patterned conductor metallization layers adjoining patterned barrier metallization layers upon semiconductor substrates. A semiconductor substrate is provided which has formed upon its surface a patterned second masking layer upon a blanket first masking layer. The patterned second masking layer is formed from a photoresist material and the blanket first masking layer is formed from a silicon oxide material, a silicon nitride material or a silicon oxynitride material. Beneath the blanket first masking layer resides a blanket multi-layer metallization stack which includes a blanket conductor metallization layer adjoining a blanket barrier metallization layer. The blanket first masking layer and the upper lying blanket metallization layer of the blanket conductor metallization layer and the blanket barrier metallization layer are successively patterned through a Reactive Ion Etch (RIE) process using as the etch mask the patterned second masking layer. The patterned second masking layer is then removed. The remaining lower lying metallization layer is then patterned through a Reactive Ion Etch (RIE) process using a patterned first masking layer and the patterned upper metallization layer as the etch mask.

REFERENCES:
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patent: 4954423 (1990-09-01), McMann et al.
patent: 5346586 (1994-09-01), Keller
patent: 5369053 (1994-11-01), Fang
patent: 5436199 (1995-07-01), Brighton
patent: 5518963 (1996-05-01), Park
VLSI Technology by Smsze, published by McGraw-Hill Book Co, Singapore, 1988, p. 226.

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