Method of modifying vias connection of printed circuit boards

Details Method of modifying vias connection of printed circuit boards Method of modifying vias connection of printed circuit boards

2011-04-12

2011-04-12

Doan, Nghia M (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C703S013000, C703S014000

Reexamination Certificate

active

07925999

ABSTRACT:
A design method of printed circuit boards includes the following steps. First, simulate a printed circuit board including power layers, and vias connected to all the power layers. Then, change connections of the vias that tend to draw too much current to be connected to fewer power layers, than the vias that tend to draw less current. Repeat adjusting connections of the vias until all vias draw a similar amount of current such that no via draws more current than an upper limit the vias are designed for. Finally, according to the results, design/fabricate a PCB with vias respectively insulated, as needed, from the power layers that do not need to be connected to the vias.

REFERENCES:
patent: 6137064 (2000-10-01), Kiani et al.
patent: 2009/0199149 (2009-08-01), Kwong
Hsu et al., Placement of Shorting Vias for Power Integrity in Multi-Layer Structures, 2008, IEEE, pp. 91-94.

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