Method of memory space configuration

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique

Reexamination Certificate

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Details

C711S127000, C711SE12001, C711SE12079

Reexamination Certificate

active

07552292

ABSTRACT:
A method is disclosed for utilizing at least one bit within the logical address code of a memory unit formed by Dynamic Random Access Memory (DRAM) to be the control code for interleaving the memory space to different memory ranks. First, the distributive rule of the data is defined. Next, the data is distributed to the memory ranks that the data belongs to according to the rule. Then, the data is physically accessed in one of the memory ranks.

REFERENCES:
patent: 5664160 (1997-09-01), Fecteau et al.

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