Semiconductor device manufacturing: process – With measuring or testing – Electrical characteristic sensed
Reexamination Certificate
2002-10-04
2003-09-23
Cuneo, Kamand (Department: 2829)
Semiconductor device manufacturing: process
With measuring or testing
Electrical characteristic sensed
C438S014000, C438S015000, C438S016000, C438S018000, C438S010000, C438S059000, C438S672000, C438S675000
Reexamination Certificate
active
06623996
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device, more particularly to the measurement of contact alignment error in the manufacture of semiconductor integrated circuits.
A semiconductor integrated circuit comprises multiple layers of conductive patterns. The different layers are interconnected by conductive plugs formed in narrow holes referred to as contact holes. The contact holes are formed by photolithography. It is essential that the contact holes be accurately aligned, so that electrical contact can be made with the patterns to be interconnected, and unwanted contact with other patterns can be avoided. Monitoring the accuracy of contact alignment is an essential aspect of quality control in the photolithography process.
Contact alignment error is conventionally measured by the use of optical patterns such as vernier patterns. Optical measurements, however, are inherently difficult to perform with high accuracy and reliability. A particular problem is that optical measurements do not directly measure the property of interest, namely electrical continuity between the contact plugs and the conductive patterns in different layers.
SUMMARY OF THE INVENTION
An object of the present invention is to measure contact alignment error in a semiconductor device electrically.
Another object of the invention is to measure contact alignment error in a semiconductor device with high accuracy and reliability.
The invention provides a semiconductor device with a resistance-measurement area comprising a plurality of conductive members and an electrode pattern. The conductive members are disposed in at least two different layers of the semiconductor device. At least two of the conductive members have differing electrical resistances. The electrode pattern includes contact plugs making electrical contact with different conductive members, depending on the alignment of the contact plugs.
Contact alignment error is measured by measuring the electrical resistance between a pair of electrodes in the electrode pattern.
The measurement is accurate and reliable, because it directly determines whether there is electrical continuity between the contact plugs and the different conductive members.
REFERENCES:
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patent: 5898228 (1999-04-01), Sugasawara
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D Kahng, T.A. Shankoff, T.T. Sheng and S.E. Haszko; “A Method for Area Saving Palnar Isolation Oxides Using Oxidation Protected Sidewalls”, Nov. 1980, J Electrochem. Soc.: Solid State Sceince and Technology; p. 2468-2471.
Cuneo Kamand
Kilday Lisa
Oki Electric Industry Co, Ltd.
Rabin & Berdo, PC.
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