Method of manufacturing very thin semiconductor chips

Details Method of manufacturing very thin semiconductor chips Method of manufacturing very thin semiconductor chips

1981-11-27

1983-06-21

Powell, William A.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

29580, 156655, 156662, H01L 21306, B44C 122, C03C 1500, C03C 2506

Patent

active

043892809

ABSTRACT:
Very thin semiconductor chips are produced from a relatively large semiconductor substrate (such as gallium arsenide substrate) by generating a select pattern of crystallographic stress areas in a front surface of the substrate, as by mechanical scoring or application of a layer of material having a coefficient of thermal expansion significantly different from that of the semiconductor material in a pattern corresponding to the desired chip; applying an etch-resistant carrier member to such stressed front surface and etching the entire back surface of the substrate into a thickness less than 50 .mu.m, whereby the etching reaction penetrates into the region of the crystallographic stress and a division of the resultant eroded body into individual chips corresponding to the selected patterns occurs, with the chips being carried by said carrier member.

REFERENCES:
patent: 3054709 (1962-09-01), Freestone et al.
patent: 3623219 (1971-11-01), Stoller et al.
patent: 3953919 (1976-05-01), Moore

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