Method of manufacturing trench-isolated semiconductor device

Details Method of manufacturing trench-isolated semiconductor device Method of manufacturing trench-isolated semiconductor device

1997-11-25

2000-10-10

Whitehead, Jr., Carl

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

438414, 438353, 438360, 438425, H01L 2176

Patent

active

061301396

ABSTRACT:
The top surface of a P-type semiconductor substrate is partitioned into an active region to be formed with an element and an isolation region surrounding the active region. The isolation region is composed of trench portions and dummy semiconductor portions. An interlayer insulating film is deposited on the substrate, followed by a wire formed thereon. In each of the semiconductor portions, an impurity diffusion layer is formed simultaneously with the implantation of ions into the element so that a PN junction is formed between the impurity diffusion layer and the silicon substrate. A capacitance component of the wiring-to-substrate capacitance in the region containing the semiconductor portions is obtained by adding in series the capacitance in the impurity diffusion layer to the capacitance in the interlayer insulating film, which is smaller than the capacitance only in the inter layer insulating film. What results is a semiconductor device having lower total wiring to-substrate capacitance and a higher operating speed.

REFERENCES:
patent: 3622382 (1971-11-01), Brack et al.
patent: 4929566 (1990-05-01), Beitman
patent: 4948742 (1990-08-01), Nishimura et al.
patent: 5270265 (1993-12-01), Hemmenway et al.
patent: 5426062 (1995-06-01), Hwang
patent: 5663588 (1997-09-01), Suzuki et al.
patent: 5665633 (1997-09-01), Meyer
patent: 5760444 (1998-06-01), Okumura
patent: 5856218 (1999-01-01), Kinoshita et al.
patent: 5877066 (1999-03-01), Stolmeijer et al.

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