Method of manufacturing transistor

Details Method of manufacturing transistor Method of manufacturing transistor

1998-09-29

2000-10-03

Pham, Long

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

438151, 438161, 438162, 438163, H01L 2184

Patent

active

061272116

ABSTRACT:
In a method of manufacturing a semiconductor device having an LDD structure, source gases for generating plural types of impurity ions exhibiting different molecular weights and different projected ranges in a target during impurity implantation are supplied to a plasma space, ionized, accelerated with a voltage, and implanted in a semiconductor region on the target substrate. In the case of manufacturing a top-gate transistor, a gate electrode on the semiconductor region has a sufficient thickness to serve as a mask. In the case of manufacturing a bottom-gate transistor, a mask and a resistor are used. An implantation angle is set to an optimum value as desired. Thereafter, the impurity is activated as desired. Thus, the semiconductor device having the LDD structure is manufactured by a single step of impurity implantation.

REFERENCES:
patent: 4375999 (1983-03-01), Nawata et al.
patent: 4716127 (1987-12-01), Shukuri et al.
"Conduction Mechanism of Leakage Current Observed in Metal-Oxide-Semiconductor Transistors and Poly-Si Thin-Film Transistors"; M. Yazaki et al.; Seiko Epson Corp.; Oct. 4, 1991; pp. 206-209; Tokyo, Japan.

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