Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
1998-07-13
2001-05-22
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S149000, C438S701000, C438S158000
Reexamination Certificate
active
06235561
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a thin-film transistor (hereinafter referred to as TFT), formed of a non-single-crystal silicon film disposed on an insulating substrate, and a liquid crystal display device furnished with the same.
2. Description of the Related Art
Since those TFTs which use a thin non-single-crystal silicon film, such as an amorphous silicon (hereinafter referred to as a-Si:H) or polycrystalline silicon (hereinafter referred to as p-Si) film, can be formed uniformly on an insulating substrate, covering a relatively wide area, they are conventionally used in pixel switches, driver circuits, etc. of active-matrix liquid crystal display devices.
In the case where one such TFT is used as a pixel switch of an active-matrix liquid crystal display device, the electrical resistance of a gate electrode of the TFT must be lowered in order to lessen waveform distortion. Gate electrodes that meet this requirement are described in Jpn. Pat. Appln. KOKAI Publication Nos. 4-353830, 5-152572, and 6-120503. These gate electrodes are composed of a low-resistance metal, such as aluminum (Al), coated with chromium (Cr), tungsten (W), titanium (Ti), tantalum (Ta), or some other metal whose melting point is higher than that of aluminum or with an aluminum alloy so that a hillock, blister, etc. of aluminum can be effectively prevented.
In Jpn. Pat. Appln. KOKAI Publication No. 4-372934, the inventors hereof proposed a method in which molybdenum (Mo) is deposited on an aluminum film, etched with use of a mixed acid, and then removed so that the aluminum film is tapered taking advantage of the difference in etching rate, in forming a gate electrode of a laminated structure from aluminum and some other metallic material, e.g., a molybdenum-tantalum (Mo—Ta) alloy, covering the aluminum film. According to this method, an insulating film on the gate electrode can be prevented from suffering insulation failure.
In order to enjoy excellent element characteristics, it is advisable to enhance the mobility of the TFT and lower its threshold voltage (V
th
), in view of the operating efficiency. With the gate electrode multilayered to lower its electrical resistance, however, the TFT has a tendency to exhibit low mobility and high threshold voltage.
SUMMARY OF THE INVENTION
The present invention has been contrived in consideration of these circumstances, and its object is to provide a thin-film transistor, of which the electrical resistance of a gate electrode can be lowered without increasing element failure and excellent element characteristics can be enjoyed, and a liquid crystal display device furnished with the same.
The inventors hereof found that the element characteristics of a TFT depend on the configuration of the interface of a thin non-single-crystal silicon film on the side of a gate insulating film in a channel region, and attained the present invention.
A TFT according to the present invention comprises a gate electrode including a first conductive layer formed on a substrate and a second conductive layer covering the first conductive layer, a gate insulating film formed on the substrate and covering the gate electrode, a thin non-single-crystal silicon film disposed on the gate insulating film on the gate electrode and including a channel region, and a source electrode and a drain electrode connected electrically to the thin non-single-crystal silicon film. The thin non-single-crystal silicon film has a continuous interface without bends, situated on the side of the gate insulating film in the channel region.
A liquid crystal display device according to the present invention comprises an array substrate and an opposite substrate facing each other with a liquid crystal layer between them. The array substrate includes a glass substrate, a plurality of gate lines formed on a principal surface of the glass substrate and extending parallel to one another, a plurality of signal lines arranged on the principal surface of the glass substrate and extending parallel to one another and substantially at right angles to the gate lines, pixel electrodes arranged individually in regions defined by the gate lines and the signal lines, and thin-film transistors provided individually at the intersections of the gate lines and the signal lines.
Each of the thin-film transistors includes a gate electrode formed of a part of one of the gate wires and including a first conductive layer formed on the glass substrate and a second conductive layer covering the first conductive layer, a gate insulating film formed on the glass substrate and covering the gate electrode, a thin non-single-crystal silicon film disposed on the gate insulating film on the gate electrode and including a channel region, and a source electrode and a drain electrode connected electrically to the thin non-single-crystal silicon film.
The thin non-single-crystal silicon film has a continuous interface without bends, situated on the side of the gate insulating film in the channel region.
According to the present invention, the gate electrode of the TFT includes at least the first conductive layer and the second conductive layer covering the same, whereby its electrical resistance is lowered, a hillock or blister is prevented, and the resistance to chemicals is improved.
The inventors hereof investigated changes of the element characteristics of the TFT, which are attributable to differences in the configuration of the principal surfaces of electrodes within the channel region, and found that the element characteristics, especially the mobility and threshold voltage (V
TH
), change depending on whether or not the interface of the thin non-single-crystal silicon film on the side of the gate insulating film in the channel region is a continuous interface without bends.
Thus, the TFT of the present invention is characterized in that the interface of the thin non-single-crystal silicon film on the side of the gate insulating film in the channel region is formed continuously without involving bends.
If the interface of the thin non-single-crystal silicon film on the side of the gate insulating film is an irregular interface that contains substantial bends, the potential barrier is believed to heighten at the bends, so that the mobility of the TFT is lowered, and the threshold voltage (V
TH
) is increased.
According to the TFT of the present invention, therefore, the interface of the thin non-single-crystal silicon film on the side of the gate insulating film in the channel region is a continuous interface containing no substantial bends, that is, a smooth interface, so that the potential barrier can be prevented from heightening, and high mobility and low threshold voltage (V
TH
) can be enjoyed.
The interface according to the invention may be obtained by a method in which the gate insulating film is made thick enough to lessen the influence of the difference in level of the principal surfaces of the gate electrodes, a method in which the second conductive layer is made thick enough, or a method in which the angle between each side wall of the first conductive layer, which constitutes each gate electrode, and the principal surface of the substrate, that is, an inclination angle (&thgr;1), is set at a value smaller enough than a value for a measure to counter insulation failure.
The inventors hereof confirmed that substantial bends can be effectively prevented from existing in the interface of the thin non-single-crystal silicon film on the side of the gate insulating film in the channel region, without changing the thickness or material of the gate insulating film, by setting the inclination angle (&thgr;1) of the first conductive layer within the range of 10° to 30°.
Insulation failure of the gate insulating film between the gate electrodes and the thin non-single-crystal silicon film can be substantially removed by properly inclining both side edge portions of the first conductive layer, which constitutes the gate electrode, and more specifically, by setting the inclination angle (&
Kubo Akira
Seiki Masahiro
Kabushiki Kaisha Toshiba
Lattin Christopher
Niebling John F.
Pillsbury & Winthrop LLP
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