Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Patent
1996-08-29
1998-11-10
Niebling, John
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
438517, 438527, 438532, 438540, H01L 2100, H01L 21425
Patent
active
058343431
ABSTRACT:
The method of manufacturing a thin film transistor, including the steps of: a first step, after a poly-crystal silicon film has been formed on a substrate (1), for forming a layer to be formed as an conductive layer (2a) for the thin film transistor by patterning the formed polycrystal silicon film; a second step for doping impurity ions at the layer to be formed as the conductive layer; a third step for cooling the substrate by a cooling mechanism after the second step; and a fourth step for forming a source region (4a.sub.1) and a drain region (4a.sub.2) in the conductive layer, respectively by repeating the second and third steps. By this method, impurities can be doped at microscopic regions, and further the highest possible throughput can be obtained.
REFERENCES:
patent: 5238858 (1993-08-01), Matsushita
patent: 5244820 (1993-09-01), Kamata
patent: 5348897 (1994-09-01), Yen
Bruhl et al, "Generation of Residual Deformations by Pulsed Ion Implantation", J. Phys. D: Appl Phys., vol. 28 (1995), pp. 1655-1660 (No month).
Mishima et al, Implantation Temperature Effect on Polycrystalline Silicon by Ion Shower Doping, J. Appl Phys., vol. 74 No. 12, Dec. 15, 1993, pp. 7114-7117.
Ogasawara Takao
Uemoto Tsutomu
Kabushiki Kaisha Toshiba
Lebetritt Michael S.
Niebling John
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