Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2006-03-14
2006-03-14
Chaudhuri, Olik (Department: 2824)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
Reexamination Certificate
active
07011996
ABSTRACT:
After a polysilicon semiconductor film5and a first gate oxide film6are formed on a transparent insulating substrate1,the semiconductor film5and the first gate oxide film6are patterned into an island shape to form an island part. At this time, an overhang part8of a visor shape is formed where side end surfaces of the first gate oxide film6and the semiconductor film5are not aligned and an end part of the first gate oxide film6projects slightly from a position of a side end surface of the semiconductor film5.The overhang part8is removed, for example, during cleaning, which thus enhances yield.
REFERENCES:
patent: 4704784 (1987-11-01), Szydlo et al.
patent: 5039621 (1991-08-01), Pollack
patent: 5120667 (1992-06-01), Tarui et al.
patent: 5328861 (1994-07-01), Miyakawa
patent: 5470762 (1995-11-01), Codama et al.
patent: 5624861 (1997-04-01), Shibuya
patent: 5998838 (1999-12-01), Tanabe et al.
patent: 6258638 (2001-07-01), Tanabe et al.
patent: 6403409 (2002-06-01), You
patent: 6444507 (2002-09-01), Miyasaka
patent: 6444508 (2002-09-01), Tanabe et al.
patent: 6703267 (2004-03-01), Tanabe et al.
patent: 6737302 (2004-05-01), Arao
patent: 2002/0192885 (2002-12-01), Miyasaka
patent: 2000-018289 (2000-04-01), None
Japanese translation of Korean Office action prepared by Korean associate and sent to Japanese associate.
Untranslated Korean Office Action issued on May 16, 2005 in connection with corresponding Korean application No. 10-2003-0031832.
English translation of relevant portions of Korean Patent Office Action issued May 16, 2005 submitted in lieu of statement of relevancy of prior art teachings to the instant application.
Okumura Hiroshi
Shiota Kunihiro
Chaudhuri Olik
Luhrs Michael K.
NEC Corporation
NEC LCD Technologies Ltd.
Ostrolenk Faber Gerb & Soffen, LLP
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