Method of manufacturing stacked semiconductor package using...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S109000, C438S618000, C257SE21585, C257SE21705

Reexamination Certificate

active

07994041

ABSTRACT:
A method of manufacturing a stacked semiconductor package using an improved technique of forming a through via in order to enable 3-dimensional vertical interconnection of stacked packages is provided. The method includes forming a seed layer required for forming a via core on a bottom surface of a wafer, forming at least one via hole vertically through the wafer, forming a via core in the via hole, insulating the via hole from the via core, and removing the seed layer from the bottom surface of the wafer. The stacked semiconductor package is suitable for high-speed signal transmission.

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Ho et al., “Development of Coaxial Shield Via in Silicon Carrier for High Frequency Application,” 2006 Electronics Packaging Technology Conference, IEEE, Institute of Microelectronics, 2006, pp. 825-830.
Sekiguchi, et al., “Novel Low Cost Integration of Through Chip Interconnection and Application to CMOS Image Server,” 2006 Electronic Components and Technology Conference, IEEE, Toshiba Corporation, 2006, pp. 1367-1374.

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