Method of manufacturing silicon carbide semiconductor device...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Reexamination Certificate

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C438S483000, C438S518000

Reexamination Certificate

active

06221700

ABSTRACT:

CROSS REFERENCE TO RELATED APPLICATION
This application is based upon and claims the benefit of Japanese Patent Application No. 10-217727, filed on Jul. 31, 1998, the contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a method of manufacturing a silicon carbide semiconductor device, capable of improving an activation rate of ions implanted into a silicon carbide semiconductor layer of the semiconductor device.
2. Description of the Related Art
Silicon carbide has been noted as a material for a high withstand voltage device usable at a high temperature. A process of manufacturing a silicon carbide device conventionally utilizes an ion-implantation technique capable of forming a high concentration region with high flexibility in manufacture. The ion-implantation technique includes high temperature ion-implantation for controlling crystal defects and high temperature heat treatment for activating impurities to realize a high activation rate of the impurities.
However, the activation rate is easily lowered due to reasons such that substitution of ion-implantation atoms is insufficient, implantation conditions (for instance, temperature) and heat treatment conditions (for instance, temperature and ambience) are not optimized, and the like.
SUMMARY OF THE INVENTION
The present invention has been made in view of the above problem. An object of the present invention is to improve an activation rate of impurities implanted into a silicon carbide semiconductor layer.
Briefly, according to a method of the present invention, an amorphous layer doped with n type or p type impurities is formed in contact with a silicon carbide semiconductor layer, and the amorphous layer is crystallized through a solid-phase growth to form an impurity layer having a specific crystal structure while disposing the impurities at lattice positions of the crystal structure. As a result, the impurities are securely substituted to the lattice positions of the crystal structure, resulting in a high activation rate of the impurities. The crystal structure of the impurity layer is preferably chosen so that a width of a forbidden band (bandgap) of the impurity layer becomes narrower than that of the semiconductor layer. Accordingly, when the impurity layer serves as a contact region, a contact resistance becomes small.
For instance, the invention can be applied to form a surface channel layer in a semiconductor device. Specifically, after an impurity implantation layer is formed in a surface portion of a base region by doping impurities thereinto, the impurity implantation layer is made amorphous by implanting ions, a kind of which is different from that of the impurities. Then, the amorphous layer is crystallized to have a specific crystal structure while disposing the impurities at lattice positions of the crystal structure, so that the surface channel layer is formed with a high activation rate of the impurities.
The invention can be applied to form a base region as well. Specifically, after an impurity implantation layer is formed in a specific surface portion of a semiconductor layer by doping impurities thereinto, the impurity implantation layer is made amorphous by doping ions, a kind of which is different from that of the impurities. Then, the amorphous impurity implantation layer is crystallized at a solid-phase to have a specific crystal structure while disposing the impurities at lattice positions of the crystal structure. As a result, the base region is formed with a high activation rate of the impurities.


REFERENCES:
patent: 5338945 (1994-08-01), Baliga et al.
patent: 5506421 (1996-04-01), Palmour
patent: 5744826 (1998-04-01), Takeuchi et al.
patent: 5773849 (1998-06-01), Harris et al.
Seshadri et al., “Comparison of the annealing behavior of high-dose nitrogen-aluminum-, and boron-implanted 4H-SiC”, American Institute of Applied Physics Letters, vol. 72, No. 16, Apr. 20, 1998, pp. 2026-2028.

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