Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1998-06-16
2000-10-17
Whitehead, Jr., Carl
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438425, 438435, 438446, 438782, H01L 2176
Patent
active
061331139
ABSTRACT:
A method of manufacturing shallow trench isolation comprising the steps of forming a pad oxide layer and a mask layer over a substrate, then patterning the pad oxide layer and the mask layer forming an opening in the substrate. Thereafter, insulating material is deposited into the opening forming an insulating layer, and then the mask layer is removed to expose the pad oxide layer. Next, insulating spacers are formed on the sidewalls of the insulating layer. Subsequently, the insulating spacers and the pad oxide layer are removed to complete the formation of shallow trench isolation. Hence, a trench-filled insulating layer having a smooth upper surface is formed. By forming insulating spacers over the junction area between the substrate and the insulating layer, over-etching of the junction is avoided.
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patent: 5882983 (1999-03-01), Gardner et al.
patent: 5918131 (1999-06-01), Hsu et al.
patent: 5960297 (1999-09-01), Saki
patent: 6005279 (1999-12-01), Luning
Ho Jau-Huang
Jenq J.S. Jason
Duong Khanh
Jr. Carl Whitehead
United Microelectronics Corp.
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