Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation
Patent
1997-04-14
1998-09-01
Fourson, George R.
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Total dielectric isolation
438295, H01L 2176
Patent
active
058010807
ABSTRACT:
According to a semiconductor device of the present invention, a field oxide film is formed so as to cover the main surface of an SOI layer and to reach the main surface of a buried oxide film. As a result, a pMOS active region of the SOI and an nMOS active region of the SOI can be electrically isolated completely. Therefore, latchup can be prevented completely. As a result, it is possible to provide a semiconductor device using an SOI substrate which can implement high integration by eliminating reduction of the breakdown voltage between source and drain, which was a problem of a conventional SOI field effect transistor, as well as by efficiently disposing a body contact region, which hampers high integration, and a method of manufacturing the same.
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A High Speed and Low Power Consumption 16 K Gate Gate Array on Ultra Thin SOI Film, Institute of Electronics, Information and Communication Engineers of Japan, Y. Yamaguchi et al., pp. 81-86, 1992.
Inoue Yasuo
Iwamatsu Toshiaki
Nishimura Tadashi
Yamaguchi Yasuo
Fourson George R.
Mitsubishi Denki & Kabushiki Kaisha
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