Method of manufacturing semiconductor local interconnect and...

Details Method of manufacturing semiconductor local interconnect and... Method of manufacturing semiconductor local interconnect and...

2005-04-26

2005-04-26

Nguyen, Thanh (Department: 2813)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S299000, C438S303000, C438S595000, C438S618000, C438S637000

Reexamination Certificate

active

06884712

ABSTRACT:
An integrated circuit, and manufacturing method therefor, is provided. A gate dielectric and a gate are provided respectively on and over a semiconductor substrate. A junction is formed adjacent the gate dielectric and a shaped spacer is formed around the gate. A spacer is formed under the shaped spacer and a liner is formed under the spacer. A first dielectric layer is formed over the semiconductor substrate, the shaped spacer, the spacer, the liner, and the gate. A second dielectric layer is formed over the first dielectric layer. A local interconnect opening is formed in the second dielectric layer down to the first dielectric layer. The local interconnect opening in the first dielectric layer is opened to expose the junction in the semiconductor substrate and the first gate. The local interconnect openings in the first and second dielectric layers are filled with a conductive material.

REFERENCES:
patent: 5783475 (1998-07-01), Ramaswami
patent: 6235598 (2001-05-01), Jan et al.
patent: 6287951 (2001-09-01), Lucas et al.
patent: 6432784 (2002-08-01), Yu
patent: 20030027414 (2003-02-01), Ko
patent: 20030129804 (2003-07-01), Mehrotra et al.
patent: 20030181028 (2003-09-01), Yeap et al.

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