Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2002-01-31
2004-01-06
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S298000, C438S423000, C438S530000
Reexamination Certificate
active
06673660
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor. More particularly, the present invention relates to a method of manufacturing a semiconductor using a LOCOS (local oxidation of silicon) method as an insulation technique of a SOI (silicon on insulator) substrate by using the SOI as a semiconductor substrate.
2. Description of the Related Art
In recent years, the use of a SOI substrate constituted by an insulation layer and a silicon layer formed on the insulation layer has been proposed as a substrate to form a semiconductor element such as a MOSFET. The use of such SOI substrate has various advantages such as improvement in an S value relating to a sub threshold characteristic, reduction of parasitic capacitance, and removal of the latch-up phenomenon and the like.
There is a so-called STI (shallow trench isolation) method beside the LOCOS method as an insulation technique in a semiconductor device using the SOJ substrate. In insulation by the LOCOS method, an oxide resistant film such as, for example, a silicon nitride film is formed on the SOI substrate and a surface of the silicon layer exposed from the oxide resistant film is oxidized. As a result, a field oxide film serving as an insulation area is formed, and a part between semiconductor elements such as a MOSFET etc. formed in an active area with its field oxide film is insulated. On the other hand, in insulation by the STI method, a groove is previously formed by etching the silicon layer of the SOI substrate and an oxide film is buried in the groove. Electric insulation between the semiconductor elements is performed by the buried oxide film.
When insulating by the STI method, it is necessary to previously form the groove in which the oxide film is buried in the SOI substrate at a time when the insulation area is formed and it is further necessary to remove the oxide film outside of the groove after the oxide film is buried in the groove. A photolithography or an etching step of forming the groove, and a step of removing the oxide film are further necessary in insulation by the STI method in comparison with insulation by the LOCOS method. As a result, the number of steps is further increased in a method of manufacturing a semiconductor device using the STI method in comparison with the method of manufacturing a semiconductor device using the LOCOS method and thereby there is a problem in that the manufacturing cost is increased.
Therefore, insulation by the LOCOS method is capable of manufacturing the semiconductor device at a lower cost and is usually employed for semiconductor devices which use the conventional SOI substrate.
However, when the LOCOS method is used to manufacture a semiconductor device using an SOI substrate, a so-called bird's beak may be formed, where the oxide film extends from the field oxide film to the pad oxide film under the oxide resistant film at the time of forming the field oxide film to perform insulation. An area of extremely thin film is formed at an end of the field oxide film. This makes the area of extremely thin film to be formed on the silicon layer under the bird's beak part.
Accordingly, when an impurity diffusion layer such as source or drain is formed in an active area of the silicon layer insulated by the field oxide film, and then a gate oxide film or a gate electrode is formed and a semiconductor element such as the MOSFET is formed on the silicon layer, sufficient thickness of the field oxide film can not be maintained in an area defined by the silicon layer on which source or drain is formed and the gate electrode extending to an upper part of the silicon layer, particularly at an area of a thin film layer under the bird's beak part where the gate electrode extends to the upper part thereof. As a result, a part of a parasitism transistor to operate with a threshold lower than a threshold in a desired MOSFET is constituted.
When the parasitism transistor is formed on the silicon layer under the bird's beak part, that is, at a LOCOS edge, undesirable hump occurs in a sub threshold characteristic according to the conventional semiconductor device. It results in a problem that the desired transistor characteristic is not performed and the current characteristic of the MOSFET is deteriorated in the semiconductor device using the SOI substrate to which the conventional LOCOS method is applied.
SUMMARY OF THE INVENTION
Therefore, it is an object of the present invention to provide a method of manufacturing a semiconductor device employing an SOI substrate at a lower manufacturing cost using insulation by a LOCOS method, which is capable of suppressing occurrence of hump and preventing a MOSFET characteristic from deteriorating.
According to the present invention, a method of manufacturing a semiconductor element, including steps of: preparing a silicon layer formed via an insulation film on a substrate, forming an oxide resistant film selectively on a pad oxide film after the pad oxide film is formed on the silicon layer, forming a field oxide film by oxidizing the silicon layer under the pad oxide film exposed from the oxide resistant film, removing the oxide resistant film and the pad oxide film after forming the field oxide film, and forming a gate insulation film on the silicon layer, and forming a gate electrode on the gate insulation film and forming an impurity diffusion layer of a first conductive type on the silicon layer surface between the gate electrode and the field oxide film, is characterized by further including steps of: implanting impurity of a second conductive type in the silicon layer under the field oxide film with the oxide resistant film as a mask after the field oxide film is formed and forming an impurity area having an impurity density higher than the density of the impurity diffusion layer on the silicon layer under the field oxide film, and performing a heat treatment for the field oxide film after the impurity area is formed and then removing the pad oxide film.
The summary of the invention does not necessarily describe all necessary features of the present invention. The present invention may also be a sub-combination of the features described above. The above and other features and advantages of the present invention will become more apparent from the following description of the embodiments taken in conjunction with the accompanying drawings.
REFERENCES:
patent: 4777147 (1988-10-01), Scott et al.
patent: 4974051 (1990-11-01), Matloubian et al.
patent: 4987093 (1991-01-01), Teng et al.
patent: 4997780 (1991-03-01), Szluk et al.
patent: 5326710 (1994-07-01), Joyce et al.
patent: 5518939 (1996-05-01), Negishi et al.
patent: 5686347 (1997-11-01), Yang
patent: 5736451 (1998-04-01), Gayet
patent: 5863823 (1999-01-01), Burgener
patent: 5972746 (1999-10-01), Wang et al.
patent: 6074929 (2000-06-01), Thomas
patent: 6177299 (2001-01-01), Hsu et al.
patent: 6277684 (2001-08-01), Hayashi et al.
patent: 6333234 (2001-12-01), Liu
patent: 6420281 (2002-07-01), Okuno et al.
patent: 03-155651 (1991-03-01), None
patent: 10-012894 (1998-01-01), None
patent: 2000-306994 (2000-11-01), None
Fourson George
Oki Electric Industry Co, Ltd.
Rabin & Berdo P.C.
Toledo Fernando
LandOfFree
Method of manufacturing semiconductor element does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of manufacturing semiconductor element, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing semiconductor element will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3222057