Method of manufacturing semiconductor devices

Chemistry: electrical and wave energy – Processes and products – Coating – forming or etching by sputtering

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438759, 438706, 438761, 216 38, C23C 1434, C23C 1446

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active

059617942

ABSTRACT:
A method of manufacturing semiconductor devices that provides excellent controllability and workability in planarizing the isolation area. The novel method comprises the steps of: forming a filling material on a semiconductor substrate formed with a plurality of trenches such that the plurality of trenches are filled up with the filling material; forming a mask having a pattern obtained by inverting a pattern of the plurality of trenches onto the surface of the filling material; etching the filling material to a predetermined depth by use of the mask to leave a protruding portion composed of the filling material on each of the plurality of trenches; and removing the mask and then the protruding portion for planarization.

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patent: 5229316 (1993-07-01), Lee et al.
patent: 5575886 (1996-11-01), Murase
English Abstract of JP 5-102100, Apr. 23, 1993.
L.F. Johnson, "Planarization of patterned surfaces by ion beam erosion", Appl. Phys. Lett., 40(7), Apr. 1, 1982.
"Shallow Trench Isolation for Ultra-Large-Scale Integrated Devices", K. Blumenstock et al., J. Vac. Sci. Techol. B 12(1), Jan./Feb. 1994 pp. 54-57 .

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