Semiconductor device manufacturing: process – Semiconductor substrate dicing – Having specified scribe region structure
Reexamination Certificate
2000-12-13
2003-06-03
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Semiconductor substrate dicing
Having specified scribe region structure
C438S460000, C438S106000, C438S313000, C438S080000, C438S118000
Reexamination Certificate
active
06573157
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a manufacturing method of a semiconductor device, a semiconductor device, a connector for a narrow pitch, an electrostatic actuator including this connector for a narrow pitch, a piezoelectric actuator, a micromachine, a liquid crystal panel, and an ink jet head using these electrostatic actuator and piezoelectric actuator, an ink jet printer on which these ink jet heads are mounted, and electronic appliances.
BACKGROUND ART
Conventionally, known is a method in which an insulating layer is formed on the surface of single crystal silicon wafer (hereinafter to be referred to as silicon wafer) and the upper surface of this insulating layer undergoes the CVD method (or spattering) and etching so that wirings, etc. are formed, and thus a semiconductor device is manufactured.
FIG. 23
is a plan view of a silicon wafer in which a semiconductor device has been formed, and
FIG. 24
is a sectional view along a line A—A in
FIG. 23
showing the main portion thereof which has been enlarged.
On the surface of a silicon wafer
1
, as shown in
FIG. 23
, a number of semiconductor devices
3
are formed and sandwiching dicing lines
5
shaping an lattice. The semiconductor device
3
shown herein has an IC
7
formed on the insulating layer
4
of the silicon wafer
1
and a micro-wiring
9
drawn out from this IC
7
.
Thus, a number of semiconductor devices
3
formed on the surface of the silicon wafer
1
are, as shown in
FIG. 25
, cut out into chips by a cutter
11
such as diamond blade or rotating thin whetstone called dicing blade along the dicing lines
5
.
The semiconductor devices
3
cut out into chips are brought into electrical and mechanical connection with an external substrate via a flexible substrate (connector) made of, for example, polyimide. Incidentally, connection between a terminal electrode of the semiconductor device
3
and an electrode of the flexible substrate is implemented by pressuring and heating by way of an anisotropy conductive adhesive containing conductive particles, etc.
However, the semiconductor substrate to be manufactured as described above gives rise to following problems.
FIGS.
26
(A) and (B) are enlarged views showing the main portions of the semiconductor device
3
cut out from the silicon wafer
1
. As shown in FIG.
26
(A), cutting out the semiconductor device
3
will cause the single crystal surface of silicon to be exposed on an end surface
1
a
along the dicing line. In addition, an insulating layer
4
formed on the surface of the silicon wafer
1
has thickness no more than around 5000 to 20000 angstroms. Therefore, there was a possibility that a conductive dust
13
floating in the air comes into attachment so as to span the insulating layer
4
as shown in FIG.
26
(A) so that the quasi-micro wiring
9
and the end surface la are short-circuited (edge short).
In addition, there was also a possibility that the soldering material or conductive adhesive
15
used for connection between IC
7
and micro-wiring
9
starts flowing out to reach the end surface
1
a
as shown in FIG.
26
(B) so that short circuit (edge short) could take place.
In the surface of the semiconductor device
3
, the portions other than the micro-wiring
9
are covered by the insulating layer
4
. Thus, there was also a possibility that in the case where static electricity takes place in the air, static electricity is charged into the micro-wiring
9
of the semiconductor device
3
, which is repeated so that the micro-wiring
9
was fused.
Incidentally, the semiconductor device includes for example a micromachine such as a piezoelectric actuator, electrostatic actuator, etc., a micromachine, etc., which is configured by connecting a semiconductor device in which an IC is disposed on a narrow pitch connector, and liquid crystal panel, etc.
DISCLOSURE OF THE INVENTION
An object of the present invention is to provide a manufacturing method of semiconductor devices in that short circuit will not take place due to dusts floating in the air, micromachines such as semiconductor device, narrow pitch connectors, electrostatic actuators, piezoelectric actuators, or the like, ink jet heads including them, ink jet printers, liquid crystal panels, and electronic appliances.
(1) A manufacturing method of semiconductor devices related to one aspect of the present invention is a manufacturing method of semiconductor devices in which a silicon wafer undergoes dicing to manufacture plural semiconductor devices, characterized in that, a groove covered by an insulating layer and spanning a dicing line is formed in the above described silicon wafer, and the above described silicon wafer undergoes dicing along the above described dicing line.
According to the above described manufacturing method, an insulating layer is formed on an outer periphery surface of a semiconductor device. Therefore, conductive dusts, which could adhere to the periphery section of the semiconductor device, will be blocked by the insulating layer formed on the outer periphery surface and will not reach the silicon crystal face. Therefore, short circuit will not take place.
In addition, soldering material or conductive adhesive to mount elements could flow out, but will be blocked by the insulating layer formed on the outer periphery surface and will not reach the silicon crystal face. Therefore, in this case too, short circuit will not take place.
(2) The manufacturing method of semiconductor device related to another aspect of the present invention is, in the above described (1), characterized in that a metal film is formed on an insulating layer after the insulating layer is formed on the bottom surface of the above described groove.
With such an arrangement, the static electricity in the air is charged into this metal film so that the semiconductor elements or wiring sections can be prevented from being charged with the static electricity. In addition, if a person who is charged with static electricity or a metal which is charged with static electricity comes into contact with a semiconductor device, the transferred static electricity is charged into the metal film so that the semiconductor elements or the wiring section can be prevented from being charged with the static electricity.
(3) A manufacturing method of the semiconductor device related to another aspect of the present invention is, in the above described (2), characterized in that the above described metal film is brought into conduction to a crystal face of the above described silicon wafer.
By such an arrangement, if a device grasping the semiconductor substrate is grounded in an assembly line, or the crystal face is grounded after assembly, the metal film can be charged with static electricity and the charged static electricity can be caused to flow, so that bad influence by static electricity can be surely prevented.
(4) A manufacturing method of the semiconductor device related to another aspect of the present invention is, in the above described (1) to (3), characterized in that the crystal face on the surface of the above described silicon wafer is the (110)-plane and the groove is formed by implementing anisotropy etching on the (110)-plane.
By an arrangement in which the (110)-plane undergoes anisotropy etching, the depth of the groove to be formed can be set freely. Thereby, the groove can be formed to have a depth corresponding to the size (length) of the dusts expected to adhere, or viscosity and quantity of the soldering material or conductive adhesive agent to be used for mounting elements.
(5) A manufacturing method of the semiconductor device related to another aspect of the present invention is, in the above described (1) to (3), characterized in that the crystal face on the surface of the above described silicon wafer is the (100)-plane, and the groove is formed by implementing anisotropy etching on the (100)-plane.
If the (100)-plane is arranged to undergo anisotropy etching, the groove can be V-shaped. Therefore, when a semiconductor device is cut out into a chip, an inclined ins
Anya Igwe U.
Smith Matthew
LandOfFree
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