Method of manufacturing semiconductor device having isolation fi

Details Method of manufacturing semiconductor device having isolation fi Method of manufacturing semiconductor device having isolation fi

1997-10-20

1999-11-09

Chaudhuri, Olik

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Recessed oxide by localized oxidation

438439, 438297, H01L 21762

Patent

active

059813598

ABSTRACT:
Disclosed is a method of manufacturing a semiconductor device having a reliable element isolation insulating film on an SOI substrate having an SOI layer. That is, the step of forming a semiconductor device on an SOI substrate includes the steps of sequentially depositing a silicon oxide film and an insulating film resistant to oxidation on the surface of the SOI layer of the SOI substrate to form a stacked film, etching the stacked film into a predetermined pattern shape to expose the SOI layer, selectively forming a thin silicon layer on the exposed SOI layer, and selectively thermally oxidizing the thin silicon layer and the exposed SOI layer by using the stacked film as a thermal oxidization mask. In the thermal oxidization step, all the thin silicon layer and the exposed SOI layer are thermally oxidized to be converted into an element isolation insulating film, and the element isolation insulating film is formed in contact with a buried oxide film below the region. Since the thin silicon layer is selectively formed in advance on the SOI layer to be converted into the element isolation insulating film, the element isolation insulating film is made thick. Even after the process of manufacturing the semiconductor device, a sufficiently thick element isolation insulating film is ensured.

REFERENCES:
patent: 5304834 (1994-04-01), Lynch
patent: 5447885 (1995-09-01), Cho et al.
patent: 5683933 (1997-11-01), Seino
Hong, S. J., et al., "Optimization of Process Condiitions for Quarter Micron Recessed Poly-Si Spacer LOCOS (RPSL) Isolation," International Conference on Solid State Devices and Materials, 1997, pp. 520-521.
Gilbert, P. V., et al., "A PELOX Isolated Sub-0.5 Micron Thin-Film SOI Technology," Symposium on VLSI Technology Digest of Technical Papers, 1995, pp. 37-38.
Sundaram, S. L., et al., "Novel Isolation Process using Selective Polysilicon Filled Trench Technology for High Speed Bipolar Ciecuits," IEEE 1990 Bipolar Circuits and Technology Meeting, 1990, pp. 26-28.

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