Method of manufacturing semiconductor device having...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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Details

C438S676000, C438S677000, C438S678000, C438S687000

Reexamination Certificate

active

06989328

ABSTRACT:
In copper plating using a damascene method, in order to prevent cost rise, dishing, erosion and the like due to the protrusion of plating on the dense wiring area to increase the time for CMP polishing, the copper plating is performed so that the current step of the copper plating has only one step for flowing current in the direction opposite to the direction of growing the plating as shown in FIG.1. In this time, this opposite direction current step is performed under the condition of a current-time product within a range between 1.0 and 120 mA×sec/cm2.

REFERENCES:
patent: 6107186 (2000-08-01), Erb
patent: 6140241 (2000-10-01), Shue et al.
patent: 6245676 (2001-06-01), Ueno
patent: 6319831 (2001-11-01), Tsai et al.
patent: 6767826 (2004-07-01), Abe
patent: 11-238703 (1999-08-01), None
patent: 2001-217208 (2001-08-01), None

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