Active solid-state devices (e.g. – transistors – solid-state diode – Responsive to non-electrical signal – Physical deformation
Reexamination Certificate
2005-06-14
2005-06-14
Prenty, Mark V. (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Responsive to non-electrical signal
Physical deformation
C257S347000, C257S619000, C073S514320
Reexamination Certificate
active
06906394
ABSTRACT:
A method of manufacturing a semiconductor device is provided. The device is manufactured with use of an SOI (Silicon On Insulator) substrate having a first silicon layer, an oxide layer, and a second silicon layer laminated in this order. After forming a trench reaching the oxide layer from the second silicon layer, dry etching is performed, thus allowing the oxide layer located at the trench bottom to be charged at first. This charging forces etching ions to impinge upon part of the second silicon layer located laterally to the trench bottom. Such part is removed, forming a movable section. For example, ions to neutralize the electric charges are administered into the trench, so that the electric charges are removed from charged movable electrodes and their charged surrounding regions. Removing the electric charges prevents the movable section to stick to its surrounding portions.
REFERENCES:
patent: 4622094 (1986-11-01), Otsubo
patent: 5316979 (1994-05-01), MacDonald et al.
patent: 5576250 (1996-11-01), Diem et al.
patent: 5578755 (1996-11-01), Offenberg
patent: 5747353 (1998-05-01), Bashir et al.
patent: 6071822 (2000-06-01), Donohue et al.
patent: 6177701 (2001-01-01), Matsumoto
patent: 6187685 (2001-02-01), Hopkins et al.
patent: 6287885 (2001-09-01), Muto et al.
patent: 6365056 (2002-04-01), Robert et al.
patent: 6373632 (2002-04-01), Flanders
patent: 6399516 (2002-06-01), Ayon
patent: 6494096 (2002-12-01), Sakai et al.
patent: 6528724 (2003-03-01), Yoshida et al.
patent: 6753201 (2004-06-01), Muto et al.
patent: 2002/0096258 (2002-07-01), Savas et al.
patent: 2002/0102775 (2002-08-01), Houng et al.
patent: 2003/0201506 (2003-10-01), Muto et al.
patent: A-3-242929 (1991-10-01), None
patent: 10-84119 (1998-03-01), None
patent: A-H11-067728 (1999-03-01), None
patent: A-11-067728 (1999-03-01), None
patent: 11-274142 (1999-10-01), None
patent: 12-31502 (2000-01-01), None
Cornel Marxer et al.: “Vertical Mirrors Fabricated by Deep Reactive Ion Etching for Fiber-Optic Switching Applications” Journal of Microelectromechanical Systems, vol. 6, No. 3, Sep. 1997, pp. 277-285.
Ao Kenichi
Fukada Tsuyoshi
Kano Kazuhiko
Muto Hiroshi
Oohara Junji
Denso Corporation
Posz Law Group , PLC
Prenty Mark V.
LandOfFree
Method of manufacturing semiconductor device capable of... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of manufacturing semiconductor device capable of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing semiconductor device capable of... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3469393