Method of manufacturing semiconductor device and...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S305000

Reexamination Certificate

active

06861692

ABSTRACT:
A vertical MIS is provided immediately above a trench-type capacitor provided in a memory cell forming region of a semiconductor substrate, and a lateral nMIS is provided in the peripheral circuit forming region of the semiconductor substrate. After forming the capacitor, the lateral nMIS is formed. In addition, after forming the lateral nMIS, the vertical MIS is formed. Furthermore, after forming a capacitor, an isolation part of the peripheral circuit is formed.

REFERENCES:
patent: 4873560 (1989-10-01), Sunami et al.
patent: 6060723 (2000-05-01), Nakazato et al.
patent: 6635526 (2003-10-01), Malik et al.
patent: 5-110019 (1993-04-01), None

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method of manufacturing semiconductor device and... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of manufacturing semiconductor device and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing semiconductor device and... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3451048

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.