Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of...
Patent
1996-07-15
1999-01-05
Niebling, John
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
430313, 430317, H01L 2131, H01L 21469
Patent
active
058562419
ABSTRACT:
The present invention provides a method for reducing the size of a semiconductor chip to be manufactured and improving the precision of processing a fine resist pattern provided for manufacturing the semiconductor chip. In particular, to manufacture a semiconductor chip having a small number of regularly-arranged elements, such as those of a memory cell array, the method uses a fine resist pattern which is formed to have regularly arranged opening portions and a dummy region surrounding the opening portions.
REFERENCES:
patent: 5066997 (1991-11-01), Sakurai et al.
patent: 5374502 (1994-12-01), Tanaka et al.
patent: 5556805 (1996-09-01), Tanizawa et al.
patent: 5578422 (1996-11-01), Mizuno et al.
Booth Richard A.
Kabushiki Kaisha Toshiba
Niebling John
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