Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2006-08-01
2006-08-01
Norton, Nadine G. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C216S074000, C216S079000, C216S083000, C216S096000, C216S099000, C438S703000, C438S704000, C438S724000, C438S744000, C438S756000
Reexamination Certificate
active
07084072
ABSTRACT:
Disclosed is a method of manufacturing a semiconductor device. The method includes the steps of forming a gate in a cell region and a peripheral region of a substrate, depositing a buffer oxide layer on the gate and the substrate, annealing a resultant structure of the substrate, depositing a nitride spacer layer on the buffer oxide layer, depositing an oxide spacer layer on the nitride spacer layer, forming an oxide spacer at the peripheral region of the substrate, and removing the oxide spacer layer remaining in the cell region. The annealing step is additionally carried out after depositing the buffer oxide layer so as to improve the interfacial surface characteristic and film quality, so that oxide etchant is prevented from penetrating into the silicon substrate during the wet dip process. Unnecessary voids are prevented from being created in the silicon substrate.
REFERENCES:
patent: 100252039 (1999-05-01), None
S.Wolf and R.N.Tauber, Silicon Processing for the VLSI Era, vol. 1, Lattice Press (1986) pp. 169 210, 230, 192-194, 532-534.
Y.-S. Lin et.al. Journal of Applied Physics, vol. 93, No. 10, pp. 5945-5952, (2003).
Lee Tae Hyeok
Park Cheol Hwan
Park Dong Su
Song Chang Rock
Woo Sang Ho
Angadi Maki
Hynix / Semiconductor Inc.
Ladas & Parry LLP
Norton Nadine G.
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