Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Having heterojunction
Reexamination Certificate
2005-04-19
2005-04-19
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
Having heterojunction
C438S354000, C438S369000, C257S197000, C257S583000, C257S586000, C257S591000
Reexamination Certificate
active
06881639
ABSTRACT:
The present invention provides a method of manufacturing semiconductor devices, by which InGaAs-base C-top HBTs are manufactured at low cost. Helium ions with a smaller radius are implanted into a p-type InGaAs layer (in external base regions) not covered with a lamination consisting of an undoped InGaAs spacer layer, n-type InP collector layer, n-type InGaAs cap layer, and collector electrode from a direction vertical to the surface of the external base layer or within an angle of 3 degrees off the vertical. In consequence, the p-type InGaAs in the external base regions remains p-type conductive and low resistive and the n-type InAlAs layer in the external emitter regions can be made highly resistive. By this method, InGaAs-base C-top HBTs can be fabricated on a smaller chip at low cost without increase of the number of processes.
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patent: 5329145 (1994-07-01), Nakagawa
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patent: 20030042503 (2003-03-01), Hartmann
Mochizuki Kazuhiro
Ouchi Kiyoshi
Tanoue Tomonori
Antonelli Terry Stout & Kraus LLP
Fourson George
Hitachi , Ltd.
Maldonado Julio J.
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