Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Ion implantation of dopant into semiconductor region
Reexamination Certificate
1999-11-29
2003-02-11
Mulpuri, Savitri (Department: 2812)
Semiconductor device manufacturing: process
Introduction of conductivity modifying dopant into...
Ion implantation of dopant into semiconductor region
C438S528000
Reexamination Certificate
active
06518150
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a method of manufacturing a semiconductor device.
2. Description of the Related Art
In a method of manufacturing a semiconductor device, the introduction (doping) of impurities into a semiconductor substrate by ion implantation (also called ┌Impla┘) is now widely used for the formation of, e.g., an impurity diffused layer (hereinafter called simply ┌diffused layer┘), a P-N junction, etc.
Since the practical utilization of high-energy ion implantation, particularly, the formation of a relatively deep extended diffused layer by ion implantation is facilitated and the uses of the ion implantation for the method of manufacturing the semiconductor device have been further increased. In a method of manufacturing a CMOS type LSI, for example, a start has already been made at heavily using MeV (Mega electron volt)-class high energy ion implantation upon formation of a PWELL layer and a NWELL layer in an Si (Silicon) substrate.
The ion implantation has been heavily used in the semiconductor device manufacturing method as described above because it is excellent in controllability and reproducibility. On the other hand, the ion implantation has the demerits of making it easy to produce crystal defects in a semiconductor layer doped with an impurity. Thus, the application of the ion implantation to the method of manufacturing the semiconductor device needs a technique for inhibiting the occurrence of the crystal defects.
The occurrence of the crystal defects by the ion implantation will first be described with ion implantation for an Si substrate as an example. Upon the ion implantation for the Si substrate, two types of point defects corresponding to an excessive Si defect and a vacancy defect are normally developed as crystal damage to the Si substrate. The excessive Si defect is of a defect in which excessive Si atoms exist between Si crystal lattices and generally results in a main crystal defect at a portion deeper than a range of projection or projected range Rp of an impurity ion, where the density of interstitial Si increases. On the other hand, the vacancy defect is of a defect in which Si atoms are missed out of the Si crystal lattice and generally results in a main crystal defect at a portion shallower than a projected range Rp of an impurity ion, where the density of the vacancy defect increases.
In order to restore or repair such point defects, the conventional method of manufacturing the semiconductor device adopts a process of effecting subsequent or post heat treatment (annealing) on an Si substrate after the implantation of an impurity ion to thereby activate an impurity and recover the point defects.
However, the simple execution of the post-annealing makes it difficult to completely restore the above-described point defects. Thus, in the conventional method of manufacturing the semiconductor device, for example, the remaining point defects form a dislocation loop upon the post-annealing or are bonded to interstitial oxygen so that oxygen precipitated nuclei are easy to be formed. At a portion deeper than a projected range Rp of an impurity ion employed in the ion implantation in particular, the formed excessive Si defect is liable to produce a dislocation loop in the post-annealing and hence the restoring of the point defects falls into difficulties.
Restoring the point defects by the post-annealing generally needs high temperature annealing. Their restoration normally needs annealing at a temperature of about 800° C. or more. In high energy ion implantation in particular, a large number of defects might remain even in the case of annealing at a temperature of about 1000° C. or more as well as difficulties encountered in completely restoring the defects in the case of the annealing at the temperature of the order referred to above. Further, the high temperature annealing has fallen into difficulties due to the progression of an increase in the diameter of a silicon wafer or the like in recent years. Thus, the restoration of the defects developed upon ion implantation is becoming increasingly difficult.
As described above, the conventional method of manufacturing the semiconductor device has the potential for the residual of the point defects within an impurity diffused region or aggregation growth of secondary and tertiary defects. Thus, there is a possibility that a bad influence will be exerted on electrical characteristics of the semiconductor device.
SUMMARY OF THE INVENTION
The present invention has been made to solve the above and other problems involved in the conventional method of manufacturing the semiconductor device.
In order to solve the above problems, the invention related to the present application provides a method of manufacturing a semiconductor device, including a first ion implanting step for introducing a predetermined impurity ion into a semiconductor layer by ion implantation using a first range of projection, which adopts a construction to be described below.
Namely, the invention adopts a construction including a second ion implanting step for introducing ions of a material element for a semiconductor layer itself into the semiconductor layer by ion implantation using a second projected range smaller than the first projected range. In the present construction, the material element for the semiconductor layer, which has been introduced in the second ion implanting step, is bonded to each vacancy defect developed in a region in the semiconductor layer, which is shallower than the first projected range in the first ion implanting step.
Thus, the amount of residual of the vacancy defects in the semiconductor layer can be reduced and the generation of various high-order defects (e.g., oxygen precipitated nuclei and metal precipitated nuclei, etc.) developed from the vacancy defects can be inhibited. Since the vacancy defects are generally easy to occur at a portion shallower than a projected range (Rp) for ion implantation when the ion implantation is done, the present construction is capable of effectively inhibiting the occurrence of the oxygen precipitated nuclei.
The invention adopts a construction including a preliminary annealing step done before the first ion implanting step and for diffusing interstitial oxygen lying in the vicinity of the surface of a semiconductor layer by annealing except for the first ion implanting step. In the present construction, the interstitial oxygen is diffused outside the semiconductor layer in the preliminary annealing step. Thus, the oxygen bonded to each vacancy defect is reduced in the neighborhood of the surface of the semiconductor layer so that the generation of oxygen precipitated nuclei can be inhibited or controlled. Since the vacancy defects are normally apt to occur in the vicinity of the surface of the semiconductor layer, the present construction can effectively inhibit the occurrence of the oxygen precipitated nuclei.
The invention adopts a construction including a third ion implanting step executed after the first ion implanting step and for introducing ions of a predetermined element different from an introduced impurity into a semiconductor layer by ion implantation using a third projected range greater than the first projected range, except for the first ion implanting step. In the present construction, vacancy defects can be generated between the first projected range and the third projected range, i.e., a region deeper than the first projected range in the semiconductor layer. Since such vacancy defects are bonded to high concentration defects of a material element for the semiconductor layer, the generation of crystal defects in the semiconductor layer can be eventually inhibited.
In the present construction, each high concentration defect of a material element for a new semiconductor layer is produced in a region deeper than the third projected range. However, the position of generation of such a defect is placed in the region deeper than the first projected range in the semiconductor l
Mulpuri Savitri
Oki Electric Industry Co. Ltd.
Volentine & Francos, PLLC
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