Method of manufacturing semiconductor device

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation

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Details

438279, 438283, 438587, H01L 21336, H01L 214763

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active

061071730

ABSTRACT:
A method of manufacturing a semiconductor device, which is designed to enhance the characteristic of a dual-gate MOS by reducing the phase difference between two gate electrodes, includes the steps of: forming a first conductivity type substrate in which a portion to be first and second gate electrodes are defined; sequentially forming a gate insulating layer and a conductive coating on the substrate; ion-implanting first conductivity type impurities into the conductive coating of a portion where the first gate electrode will be formed; ion-implanting second conductivity type impurities into the conductive coating of a portion where the second gate electrode will be formed; selectively etching the conductive coating, leaving only a portion doped with the first and second conductivity type impurities, and forming the first and second gate electrodes; and forming impurity regions in the surface of the substrate on both sides of the first and second gate electrodes.

REFERENCES:
patent: 5574294 (1996-11-01), Shepard
patent: 5849641 (1998-12-01), Arnett et al.
Guinn et al. (1995) J. Vac. Sci. Technol. B, vol. 13(2), No. 2, Mar./Apr. 1995, pp. 214-226.

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