Adhesive bonding and miscellaneous chemical manufacture – Delaminating processes adapted for specified product – Delaminating in preparation for post processing recycling step
Patent
1987-03-06
1989-08-29
Stoll, Robert L.
Adhesive bonding and miscellaneous chemical manufacture
Delaminating processes adapted for specified product
Delaminating in preparation for post processing recycling step
156610, 156613, 156614, 1566267, 156DIG64, 156DIG80, C30B 1322
Patent
active
048614181
ABSTRACT:
A method of manufacturing a semiconductor crystalline layer comprising the following steps: a step of forming, on a single crystalline substrate composed of a semiconductor having a main face on <001> face and having a diamond-type crystal structure, an orientation flat face in which the direction of the intersection with the main face makes a predetermined angle relative to the direction <110> on the main face and which serves as a reference for defining the direction of arranging semiconductor chips formed on the substrate; a step of forming, on the main face of the substrate, an insulation layer at least a portion of which has an opening reaching the main face and which insulates the substrate at the region other than the opening; a step of forming a semiconductor layer composed of a polycrystalline or amorphous semiconductor on the surface of the opening and the insulation layer; a step of forming a reflectivity varying layer which is in the direction in parallel with or vertical to the intersection between the orientation flat face and the main face, has the width and the distance in a predetermined period and is set so as to show periodical reflectivity variation to the argon laser beams; and a step of scanning the argon laser beams under continuous irradiation by way of the reflectivity varying layer to the semiconductor layer in the direction identical with or at an angle within a certain permissible range to the direction <110> of the main face or the direction equivalent thereto.
REFERENCES:
patent: 4371421 (1983-02-01), Fan et al.
patent: 4448632 (1984-05-01), Akasaka
patent: 4479846 (1984-10-01), Smith et al.
patent: 4494300 (1985-01-01), Schwuttke et al.
patent: 4565584 (1986-01-01), Tamura et al.
patent: 4590130 (1986-05-01), Cline
Lam et al., "Single Crystal Silicon-on-Oxide by a Scanning CW Laser Induced Lateral Seeding Process", Journal Electrochemical Society, Sep. 1981, pp. 1981-1986.
Colinge et al., "Use of Selective Annealing for Growing Very Large Grain Silicon on Insulator Films", Appl. Phys. Lett. 41 (4), Amer. Institute of Physics, Aug. 15, 1982, pp. 346-347.
Inoue Yasuo
Kusunoki Shigeru
Nishimura Tadashi
Sugahara Kazuyuki
Kozo Iizuka, Director General, Agency of Industrial Science and
Kunemund Robert M.
Stoll Robert L.
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