Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2007-10-30
2009-11-10
Smith, Matthew (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C257SE21575, C257SE23141
Reexamination Certificate
active
07615481
ABSTRACT:
A method of manufacturing a multilevel interconnect structure using a screen printing method is disclosed. In the multilevel interconnect structure, an interlayer insulating film having a through hole with a conductive bump therein, and a second interconnect line are stacked on a substrate with a first interconnect line formed thereon. The first interconnect line is electrically connected to the second interconnect line via the conductive bump. The method includes a step of forming a first region of the interlayer insulating film on the substrate with the first interconnect line formed thereon, the first region including a part of a peripheral wall of the through hole; a step of forming a second region of the interlayer insulating film on the substrate with the first region formed thereon, the second region including a remaining part of the peripheral wall of the through hole; and a step of forming the conductive bump.
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patent: 4529835 (1985-07-01), Mizuno
patent: 2007/0054212 (2007-03-01), Akiyama et al.
patent: 2006-120873 (2006-05-01), None
patent: 2007-95783 (2007-04-01), None
Fan Michele
Oblon, Spivak McClelland, Maier & Neustadt, L.L.P.
Ricoh & Company, Ltd.
Smith Matthew
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