Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Having heterojunction
Reexamination Certificate
2001-05-22
2002-09-24
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
Having heterojunction
C438S235000, C438S309000, C438S343000, C438S350000
Reexamination Certificate
active
06455390
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to hetero-junction bipolar transistors (HBTs) manufactured by a metal-organic chemical vapor deposition (MOCVD) method and in particular to a method of manufacturing the same capable of improving properties of the HBTs.
2. Description of the Background Art
An HBT comprised of a collector of n-type GaAs, a base of p-type GaAs and an emitter of n-type AlGaAs has been increasingly studied and developed to be used as an ultra high speed electronic device.
An HBT used as a high current transistor for mobile communication is required to have a base layer having a hole carrier concentration of at least 2×10
19
/cm
3
. Furthermore, an HBT used in milliwave communication in the future is required to have a still higher hole carrier concentration of at least 4×10
19
/cm
3
. To obtain such high hole carrier concentrations, carbon has been noted as impurity atoms of the base layers. A main reason therefor is that carbon characteristically has a small diffusion constant in a crystal of a base layer and is also capable of heavy doping.
For example, Japanese Patent Laying-Open No. 9-50963 discloses that an MOCVD method using trimethyl (TM) Ga for a precursor for a group-III element, AsH
3
for a precursor for a group-V element and CBr
4
for a precursor for carbon is employed to grow a carbon-doped GaAs layer, which has achieved a hole carrier concentration of approximately 4×10
19
/cm
3
.
FIG. 8
schematically shows a cross section of a semiconductor wafer for an HBT prepared by the inventors of the present application according to a conventional technique. It should be noted that in the figures, same reference characters denote corresponding portions. The
FIG. 8
semiconductor wafer includes a substantially an insulated GaAs substrate
1
on which an n-type GaAs collector contact layer
2
of 0.5 &mgr;m thickness with an electron carrier concentration of 5×10
18
/cm
3
, an n-type GaAs collector layer
3
of 0.7 &mgr;m thickness with an electron carrier concentration of 2×10
16
/cm
3
, a carbon-doped, p-type GaAs base layer
4
of 0.1 &mgr;m thickness with a hole carrier concentration of 2×10
19
/cm
3
, an n-type Al
0.3
Ga
0.7
As emitter layer
5
of 0.1 &mgr;m thickness with an electron carrier concentration of 5×10
17
/cm
3
, and an n-type GaAs emitter contact layer
6
of 0.2 &mgr;m thickness with an electron carrier concentration of 5×10
18
/cm
3
are successively, epitaxially grown using an MOCVD method.
In growing p-type GaAs base layer
4
, at a temperature of 590° C. the flow-rate ratio of TMAs for a precursor for a group-V element to TMGa for a precursor for a group-III element, i.e., V/III was set at 3.5 and the flow rate of TMGa was set at 1.5 sccm. n-type Al
0.3
Ga
0.7
As emitter layer
5
and n-type GaAs emitter contact layer
6
were also grown at the temperature of 590° C.
The
FIG. 8
semiconductor wafer thus obtained according to a conventional technique was used to fabricate an HBT and measure it for current gain thereof. As a result, it has been found that the HBT's current gain valies depending on the current flow, thermal stress and the like in the HBT. It had a current-gain variation ratio of 1.8, assuming that a current-gain variation ratio is defined as a current gain of an HBT after sufficient current flow that is divided by an initial current gain of the HBT.
According to a result of an experiment carried out by the inventors of the present application, operating a circuit as designed, including a high current transistor for mobile communication, requires a current-gain variation ratio of no more than 1.1, more preferably no more than 1.05. In other words, a circuit which includes an HBT used as a high current transistor for mobile communication will not operate as designed if the HBT is fabricated using the
FIG. 8
semiconductor wafer obtained according to a conventional technique.
SUMMARY OF THE INVENTION
In view of such conventional technique as described above, an object of the present invention is to provide a method of manufacturing an HBT having improved properties and capable of being used for a power amplifier for mobile communication.
In accordance with the present invention, a method of manufacturing an HBT including a carbon-doped base layer includes the steps of (a) growing the base layer on an underlying layer through chemical vapor deposition, (b) forming at least one semiconductor layer on the base layer, and (c) then subjecting the base layer to thermal annealing at a temperature in a range of 520° C. to 650° C.
Such manufacturing method of the present invention can provide an HBT with small current-gain variation ratio. A reason therefor may be considered as follows:
For example, if carbon is used as impurity atoms for a p-type GaAs base layer included in an HBT, carbon is required to occupy a lattice site of As as a group-V atom. Accordingly, the p-type GaAs base layer grows under an MOCVD condition with less As, i.e., with a smaller V/III ratio than an n-type GaAs layer and a non-doped GaAs layer do.
The base layer grown under an MOCVD condition with such reduced V/III ratio is considered to have more As vacancies than the n-type GaAs layer and the non-doped GaAs layer have. When the As vacancies act as electron traps, the HBT's base current increases and its current gain decreases. This phenomenon similarly occurs when AlGaAs, InGaAs or the like is used for the base layer. The reason of the current-gain variation depending on the current flow, thermal stress and the like in an HBT may be because the electron occupation ratio of the energy level of As vacancies varies depending on current flow, thermal stress and the like so that the As vacancies act as electron traps at some times and fail to act as electron traps at other times.
According to the manufacturing method of the present invention described above, a semiconductor wafer for an HBT that is subjected to thermal annealing in an appropriate temperature range may result in less As vacancies in the base layer and hence smaller variation in current gain.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.
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Ogawa et al., “Heavily Si-Doped GaAs and AlAs
-GaAs Superlattice Grown by Molecular Beam Epitaxy”, Japanese Journal of Applied Physics, Aug., 1985, pp. L572-L574.*
Hartmann et al., “Effects of annealing on the performance of InP/InGaAs HBTs grown by LP-MOCVD”, Indiumn Phosphine and Related Materials, 1997, International Conference, pp. 505-508.
Fujita Koichiro
Takahashi Naoki
Malsawma Lex H.
Sharp Kabushiki Kaisha
Smith Matthew
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