Method of manufacturing dual orientation wafers

Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate – Amorphous semiconductor

Reexamination Certificate

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C438S488000

Reexamination Certificate

active

07344962

ABSTRACT:
Disclosed is a method of manufacturing dual orientation wafers. A trench is formed in a multi-layer wafer to a silicon substrate with a first crystalline orientation. The trench is filled with a silicon material (e.g., amorphous silicon or polysilicon trench). Isolation structures are formed to isolate the silicon material in the trench from a semiconductor layer with a second crystalline orientation. Additional isolation structures are formed within the silicon material in the trench and within the semiconductor layer. A patterned amorphization process is performed on the silicon material in the trench and followed by a recrystallization anneal such that the silicon material in the trench recrystallizes with the same crystalline orientation as the silicon substrate. The resulting structure is a semiconductor wafer with isolated semiconductor areas on the same plane having different crystalline orientations as well as isolated sections within each semiconductor area for device formation.

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patent: 2005/0116290 (2005-06-01), de Souza et al.
patent: 2005/0277260 (2005-12-01), Cohen et al.

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