Method of manufacturing dielectric as load resistor in 4T SRAM

Details Method of manufacturing dielectric as load resistor in 4T SRAM Method of manufacturing dielectric as load resistor in 4T SRAM

1994-07-05

1995-10-24

Chaudhari, Chandra

Fishing, trapping, and vermin destroying

437 46, 437918, H01L 218244

Patent

active

054610001

ABSTRACT:
A method of for manufacture of a semiconductor device on a semiconductor substrate including an SRAM cell with a resistor comprises formation of a first polysilicon layer on the semiconductor substrate, patterning and etching the first polysilicon layer, formation of an interpolysilicon layer over the first polysilicon layer, patterning and etching an opening through the interpolysilicon layer exposing a contact area on the surface of the first polysilicon layer, forming a dielectric load resistor in the opening upon the contact area on the first polysilicon layer, and formation of a second polysilicon layer on the device over the dielectric load resistor, over the interpolysilicon layer.

REFERENCES:
patent: 4755480 (1988-07-01), Yau et al.
patent: 4950620 (1990-08-01), Harrington, III
patent: 5126279 (1992-06-01), Roberts
patent: 5200356 (1993-04-01), Tanaka
patent: 5266156 (1993-11-01), Nasr
patent: 5268325 (1993-12-01), Spinner, III et al.
Ghandhi, S. K., "Fabrication Principles, Silicon and Gallium Arsenide", 1983, pp. 372-373.

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