Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-05-24
2003-12-30
Pham, Long (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S470000, C257S339000, C257S605000
Reexamination Certificate
active
06670685
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
This invention relates generally to semiconductor devices and, more specifically, to a semiconductor device with a floating ring structure and a method of manufacturing the same.
OVERVIEW
Many high power applications require the use of high voltage semiconductor devices, such as drain extended metal oxide semiconductors (DEMOS). Certain important characteristics of a DEMOS include its on-state resistance, its breakdown voltage, and its robustness. Operation of conventional high voltage semiconductor devices typically results in significant design parameter degradation in a relatively short period of time. To counteract this design parameter degradation, conventional devices require overdesign of the semiconductor device to meet the desired operational characteristics over the complete lifetime of the device.
SUMMARY OF EXAMPLE EMBODIMENTS
The present invention provides an improved apparatus and method for minimizing degradation of high voltage semiconductor device parameters without compromising the off-state breakdown and on-state resistance of the device. In accordance with the present invention, an apparatus and method for minimizing degradation of high voltage semiconductor device parameters is provided that reduce or eliminate at least some of the shortcomings associated with prior approaches.
In one embodiment, a high voltage semiconductor device comprises a drain region disposed within a semiconductor substrate. The semiconductor device further comprises a field oxide layer disposed outwardly from the drain region of the semiconductor substrate. The semiconductor device also comprises a floating ring structure disposed inwardly from at least a portion of the field oxide layer. In one particular embodiment, a device parameter degradation associated with the semiconductor device comprises one (1) percent or less after approximately five hundred (500) second of accelerated lifetime operation. In this example, device parameter degradation after approximately five hundred (500) seconds of accelerated lifetime operation is approximately equivalent to a greater than 10 year lifetime during normal device operation.
In another embodiment, a high voltage semiconductor device comprises a drain region disposed within a semiconductor substrate. The semiconductor device further comprises a gate oxide layer disposed outwardly from a semiconductor substrate. The semiconductor device also comprises a field oxide layer disposed outwardly from the drain region of the semiconductor substrate. The semiconductor device further comprises a floating ring structure disposed inwardly from at least a portion of the field oxide layer and operable to divert current from the gate oxide layer. In one particular embodiment, during operation the semiconductor device operates at a voltage higher than the gate oxide can normally withstand without incurring damage.
In a method embodiment, a method of forming a semiconductor device comprises forming a drain region within a semiconductor substrate. The method further comprises forming a field oxide layer disposed outwardly from the drain region. The method also comprises forming a floating ring structure disposed inwardly from at least a portion of the field oxide layer. In one particular embodiment, the floating ring structure comprises a first dopant type that is substantially complimentary to a second dopant type used to form the drain region.
Depending on the specific features implemented, particular embodiments of the present invention may exhibit some, none, or all of the following technical advantages. Various embodiments minimize degradation to the semiconductor device parameters due to hot carrier injection. Some embodiments may improve on-state breakdown voltage, while maintaining a relatively high off-state breakdown voltage and a desirable on-state resistance.
REFERENCES:
patent: 6127709 (2000-10-01), Wagers et al.
patent: 6384462 (2002-05-01), Pauchard et al.
patent: 6468837 (2002-10-01), Pendharkar et al.
patent: 2003/0025154 (2003-02-01), Haynie
Brady III W. James
McLarty Peter K.
Pham Long
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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