Metal working – Piezoelectric device making
Reexamination Certificate
2000-10-30
2004-01-13
Eley, Timothy V. (Department: 3724)
Metal working
Piezoelectric device making
C029S846000, C029S847000, C216S013000, C252S06290R
Reexamination Certificate
active
06675450
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to electronic devices, more particularly to methods for manufacturing and mounting electronic devices such as thin film resonators (TFRs) to limit parasitic effects.
DESCRIPTION OF THE RELATED ART
Electronic devices such as thin film resonators (hereinafter “TFR”) are typically used in high-frequency, high-power environments ranging from several hundred megahertz (MHz) to several gigahertz (GHz).
FIG. 1
illustrates a side view or cross-section of a typical TFR component
100
. In
FIG. 1
, TFR component
100
includes a piezoelectric material
110
interposed between two conductive electrode layers
105
and
115
, with electrode layer
115
formed on a support structure
120
. The support structure
120
may be a membrane, or may be a plurality of alternating reflecting layers on a solid semiconductor substrate which may be made of silicon or quartz, for example. The piezoelectric material is preferably one selected from the group comprising at least ZnO, CdS and AlN. Electrode layers
105
and
115
are formed from a conductive material, preferably of Al, but may be formed from other conductors as well.
TFRs are often used in electronic signal filters, more particularly in TFR filter circuits applicable to a myriad of communication and microelectronic technologies. For example, TFR filter circuits may be employed in cellular, wireless and fiber-optic communications, as well as in computer or computer-related information-exchange or information-sharing systems.
The piezoelectric material in TFR resonators converts electrical to mechanical energy and vice versa, such that at its mechanical resonance frequency, the electrical behavior of the device abruptly changes. Electrical signals of particular frequencies easily pass thorough the resonators, while others will not be transmitted. These particular frequencies can typically be dictated by choosing resonator size and design. Resonators of certain sizes and design frequencies can be networked in appropriate combinations, such that they will impose desired filtering functions on signals passing through the network.
A standard approach to designing filters out of resonators is to arrange them out of simple building blocks such as in a ladder configuration, that is, in an alternating series-shunt relationship. A series element in this sense carries signal from an input toward an output, whereas a shunt element provides an alternative path for the signal to ground. The transmission or blocking characteristics of both series and shunt elements affect the final signal reaching output from input, somewhat analogous to how branching of water pipes can affect the flow through the main water line.
FIG. 2
illustrates schematically this simple building block, commonly known as a T-Cell. Referring specifically to
FIG. 2
, a schematic of a T-Cell building block
200
includes three TFR components
210
,
220
and
230
. TFR components
210
and
220
comprise the “series arm” portion of the T-Cell block, being connected in series between an input port
215
and an output port
225
of T-Cell
200
. TFR component
230
comprises the “shunt leg” portion of T-Cell
200
, being connected in shunt between node
235
and ground. A TFR T-Cell itself may define a filter; although a TFR ladder filter typically has a plurality of these T-cells concatenated together.
As can be seen from
FIG. 1
, many electronic devices fabricated today using planar technologies are built on silicon wafers. In some of these devices, only the first few microns of the wafer's bulk or thickness are involved in the device's performance. In other devices, this wafer serves only as a mechanical support.
As will described in further detail below, the manufacturing process for many electronic devices, a TFR being just one exemplary device, often entails the deposition and patterning of several metallic layers that in a final form serve as intergral parts of the device, and/or as interconnects between these integral parts.
One of the most serious and persistent problems regarding the above device is the effects of parasitic capacitances and inductances on device performance. These parasitics are typically created by interactions between the substrate and the layers forming the device; and/or these parasitic capacitances and inductances are already present in the connecting layers within the device. In general, any pair of conducting or semi-conducting plates separated by a dielectric material may act as a capacitor, and any strip of conducting material may act as an inductor. Such structures are often included as part of a circuit's design. However, these structures may also occur incidentally as part of a circuit's physical layout.
FIG.
1
(
b
) illustrates parasitic capacitors which could be present within the TFR device of FIG.
1
(
a
). FIG.
1
(
b
) is essentially the TFR of FIG.
1
(
a
), but illustrates capacitors which may be intended in its design (see at
125
); and those capacitors which may be incidental to the TFR's layout (see at
130
). These incidental (i.e., parasitic) capacitors, resulting from interactions between the device structure and the substrate, tend to degrade device performance and should be accounted for and limited. Accordingly, what is needed is a method of manufacturing electronic devices such as TFRs that do not suffer from the detrimental effects that parasitics currently have on device efficiency and performance.
SUMMARY OF THE INVENTION
The present invention provides a method of manufacturing electronic devices that have at least a portion of their supporting substrate removed to eliminate parasitic capacitance. In another aspect of the invention, a mounting technique for mounting the aforementioned electronic device is described for tuning out any residual parasitics.
In one embodiment, after providing the substrate, the substrate surface is coated with a thin, etch-resistant film. The film acts as a barrier to allow removal of at least some of the substrate material during subsequent manufacturing steps, creating a suspended structure upon which the remaining layers of circuitry rest. In another embodiment, a film which is an integral part of the device acts as the supporting membrane.
Regarding the mounting method, solder bumps are applied near the ends of conductors or electrodes of the manufactured device. The completed die (surface on which the substrate/membrane and device circuitry rest) is then inserted vertically and/or edge-on into a carrier or package that is to include the device, and the solder bumps are reflowed (i.e., melted with a conventionally used heat source) to establish contact with corresponding bonding strips on the carrier. Both the manufacturing and mounting techniques may reduce and/or eliminate the adverse effects of parasitics, since these membrane-supported devices suffer from essentially no parasitic capacitance, and little if any parasitic inductance.
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Fetter Linus Albert
Wong Yiu-Huen
Zierdt Michael George
Agere Systems Guardian Corp.
Eley Timothy V.
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