Method of manufacturing a vertical MOS transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Reexamination Certificate

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Details

C438S206000, C438S212000, C438S268000

Reexamination Certificate

active

11513005

ABSTRACT:
In a method of manufacturing a vertical MOS transistor, a body region, a trench, a gate oxide film, a gate electrode, a source region, and a body contact region are successively formed in a semiconductor substrate. A first insulating film is deposited over the main surface of the semiconductor substrate and the gate electrode, and the first insulating film is then etched to form side spacers made of the first insulating film on the wall surfaces of the trench so as to overly the gate electrode. A second insulating film is deposited over a main surface of the semiconductor substrate, the gate electrode, and the first insulating film. The second insulating film is then etched back so as to entirely expose the source region and the body contact region. A source metal electrode is formed over the main surface of the semiconductor substrate so as to cover the source region and body contact region.

REFERENCES:
patent: 2003/0089946 (2003-05-01), Hshieh et al.

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